[PATCH v3] Fixes: a6b7c98afdca(drm/mediatek: add mtk_dither_set_common() function)

STALE1844d

3 messages, 2 authors, 2021-07-20 · open the first message on its own page

[PATCH v3] Fixes: a6b7c98afdca(drm/mediatek: add mtk_dither_set_common() function)

From: Yongqiang Niu <hidden>
Date: 2021-07-20 05:52:10 

Change since v2:
- add fixes tag and modify commit message

Yongqiang Niu (1):
  Fixes: a6b7c98afdca(drm/mediatek: add mtk_dither_set_common()
    function)

 drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 2 ++
 1 file changed, 2 insertions(+)

-- 
1.8.1.1.dirty
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[PATCH v3] Fixes: a6b7c98afdca(drm/mediatek: add mtk_dither_set_common() function)

From: Yongqiang Niu <hidden>
Date: 2021-07-20 05:51:55 

dither 6 setting is missed in a6b7c98afdca
bit 1 is lfsr_en( "Enables LFSR-type dithering"), need enable
bit 2 is rdither_en(Enables running order dithering), need disable

Signed-off-by: Yongqiang Niu <redacted>
---
 drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
index 99cbf44..7dd8e05 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
@@ -26,6 +26,7 @@
 #define DISP_OD_CFG				0x0020
 #define DISP_OD_SIZE				0x0030
 #define DISP_DITHER_5				0x0114
+#define DISP_DITHER_6				0x0118
 #define DISP_DITHER_7				0x011c
 #define DISP_DITHER_15				0x013c
 #define DISP_DITHER_16				0x0140
@@ -135,6 +136,7 @@ void mtk_dither_set_common(void __iomem *regs, struct cmdq_client_reg *cmdq_reg,
 
 	if (bpc >= MTK_MIN_BPC) {
 		mtk_ddp_write(cmdq_pkt, 0, cmdq_reg, regs, DISP_DITHER_5);
+		mtk_ddp_write(cmdq_pkt, 0x3002, cmdq_reg, regs, DISP_DITHER_6);
 		mtk_ddp_write(cmdq_pkt, 0, cmdq_reg, regs, DISP_DITHER_7);
 		mtk_ddp_write(cmdq_pkt,
 			      DITHER_LSB_ERR_SHIFT_R(MTK_MAX_BPC - bpc) |
-- 
1.8.1.1.dirty
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Re: [PATCH v3] Fixes: a6b7c98afdca(drm/mediatek: add mtk_dither_set_common() function)

From: Hsin-Yi Wang <hidden>
Date: 2021-07-20 06:03:31 

On Tue, Jul 20, 2021 at 1:51 PM Yongqiang Niu
[off-list ref] wrote:
dither 6 setting is missed in a6b7c98afdca
bit 1 is lfsr_en( "Enables LFSR-type dithering"), need enable
bit 2 is rdither_en(Enables running order dithering), need disable
Fixes tag should be here, and the title of this patch should be the
same as v2: drm/mediatek: add dither 6 setting
quoted hunk
Signed-off-by: Yongqiang Niu <redacted>
---
 drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
index 99cbf44..7dd8e05 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
@@ -26,6 +26,7 @@
 #define DISP_OD_CFG                            0x0020
 #define DISP_OD_SIZE                           0x0030
 #define DISP_DITHER_5                          0x0114
+#define DISP_DITHER_6                          0x0118
 #define DISP_DITHER_7                          0x011c
 #define DISP_DITHER_15                         0x013c
 #define DISP_DITHER_16                         0x0140
@@ -135,6 +136,7 @@ void mtk_dither_set_common(void __iomem *regs, struct cmdq_client_reg *cmdq_reg,

        if (bpc >= MTK_MIN_BPC) {
                mtk_ddp_write(cmdq_pkt, 0, cmdq_reg, regs, DISP_DITHER_5);
+               mtk_ddp_write(cmdq_pkt, 0x3002, cmdq_reg, regs, DISP_DITHER_6);
                mtk_ddp_write(cmdq_pkt, 0, cmdq_reg, regs, DISP_DITHER_7);
                mtk_ddp_write(cmdq_pkt,
                              DITHER_LSB_ERR_SHIFT_R(MTK_MAX_BPC - bpc) |
--
1.8.1.1.dirty
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