[RESEND v4 0/2] add one regulator used to power up pcie phy

8 messages, 3 authors, 2021-05-14 · open the first message on its own page

[RESEND v4 0/2] add one regulator used to power up pcie phy

From: Richard Zhu <hongxing.zhu@nxp.com>
Date: 2021-03-30 08:23:17

Changes:
Only add "Reviewed-by: Lucas Stach [off-list ref]" in the
first patch. No other changes. Make it easier to be integrated later.

[RESEND v4 1/2] dt-bindings: imx6q-pcie: add one regulator used to
[RESEND v4 2/2] PCI: imx: clear vreg bypass when pcie vph voltage is

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[RESEND v4 2/2] PCI: imx: clear vreg bypass when pcie vph voltage is 3v3

From: Richard Zhu <hongxing.zhu@nxp.com>
Date: 2021-03-30 08:23:17

Both 1.8v and 3.3v power supplies can be used by i.MX8MQ PCIe PHY.
In default, the PCIE_VPH voltage is suggested to be 1.8v refer to data
sheet. When PCIE_VPH is supplied by 3.3v in the HW schematic design,
the VREG_BYPASS bits of GPR registers should be cleared from default
value 1b'1 to 1b'0. Thus, the internal 3v3 to 1v8 translator would be
turned on.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
---
 drivers/pci/controller/dwc/pci-imx6.c | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)
diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index 853ea8e82952..94b43b4ecca1 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -37,6 +37,7 @@
 #define IMX8MQ_GPR_PCIE_REF_USE_PAD		BIT(9)
 #define IMX8MQ_GPR_PCIE_CLK_REQ_OVERRIDE_EN	BIT(10)
 #define IMX8MQ_GPR_PCIE_CLK_REQ_OVERRIDE	BIT(11)
+#define IMX8MQ_GPR_PCIE_VREG_BYPASS		BIT(12)
 #define IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE	GENMASK(11, 8)
 #define IMX8MQ_PCIE2_BASE_ADDR			0x33c00000
 
@@ -80,6 +81,7 @@ struct imx6_pcie {
 	u32			tx_swing_full;
 	u32			tx_swing_low;
 	struct regulator	*vpcie;
+	struct regulator	*vph;
 	void __iomem		*phy_base;
 
 	/* power domain for pcie */
@@ -621,6 +623,17 @@ static void imx6_pcie_init_phy(struct imx6_pcie *imx6_pcie)
 				   imx6_pcie_grp_offset(imx6_pcie),
 				   IMX8MQ_GPR_PCIE_REF_USE_PAD,
 				   IMX8MQ_GPR_PCIE_REF_USE_PAD);
+		/*
+		 * Regarding the datasheet, the PCIE_VPH is suggested
+		 * to be 1.8V. If the PCIE_VPH is supplied by 3.3V, the
+		 * VREG_BYPASS should be cleared to zero.
+		 */
+		if (imx6_pcie->vph &&
+		    regulator_get_voltage(imx6_pcie->vph) > 3000000)
+			regmap_update_bits(imx6_pcie->iomuxc_gpr,
+					   imx6_pcie_grp_offset(imx6_pcie),
+					   IMX8MQ_GPR_PCIE_VREG_BYPASS,
+					   0);
 		break;
 	case IMX7D:
 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,
@@ -1130,6 +1143,13 @@ static int imx6_pcie_probe(struct platform_device *pdev)
 		imx6_pcie->vpcie = NULL;
 	}
 
+	imx6_pcie->vph = devm_regulator_get_optional(&pdev->dev, "vph");
+	if (IS_ERR(imx6_pcie->vph)) {
+		if (PTR_ERR(imx6_pcie->vph) != -ENODEV)
+			return PTR_ERR(imx6_pcie->vph);
+		imx6_pcie->vph = NULL;
+	}
+
 	platform_set_drvdata(pdev, imx6_pcie);
 
 	ret = imx6_pcie_attach_pd(dev);
-- 
2.17.1


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Re: [RESEND v4 2/2] PCI: imx: clear vreg bypass when pcie vph voltage is 3v3

From: Bjorn Helgaas <helgaas@kernel.org>
Date: 2021-05-06 21:09:22

On Tue, Mar 30, 2021 at 04:08:21PM +0800, Richard Zhu wrote:
Both 1.8v and 3.3v power supplies can be used by i.MX8MQ PCIe PHY.
In default, the PCIE_VPH voltage is suggested to be 1.8v refer to data
sheet. When PCIE_VPH is supplied by 3.3v in the HW schematic design,
the VREG_BYPASS bits of GPR registers should be cleared from default
value 1b'1 to 1b'0. Thus, the internal 3v3 to 1v8 translator would be
turned on.
Maybe something like this?

  PCI: imx6: Enable PHY internal regulator when supplied >3V

  The i.MX8MQ PCIe PHY needs 1.8V but can by supplied by either a 1.8V
  or a 3.3V regulator.  

  The "vph-supply" DT property tells us which external regulator
  supplies the PHY.  If that regulator supplies anything over 3V,
  enable the PHY's internal 3.3V-to-1.8V regulator.
quoted hunk
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
---
 drivers/pci/controller/dwc/pci-imx6.c | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)
diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index 853ea8e82952..94b43b4ecca1 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -37,6 +37,7 @@
 #define IMX8MQ_GPR_PCIE_REF_USE_PAD		BIT(9)
 #define IMX8MQ_GPR_PCIE_CLK_REQ_OVERRIDE_EN	BIT(10)
 #define IMX8MQ_GPR_PCIE_CLK_REQ_OVERRIDE	BIT(11)
+#define IMX8MQ_GPR_PCIE_VREG_BYPASS		BIT(12)
 #define IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE	GENMASK(11, 8)
 #define IMX8MQ_PCIE2_BASE_ADDR			0x33c00000
 
@@ -80,6 +81,7 @@ struct imx6_pcie {
 	u32			tx_swing_full;
 	u32			tx_swing_low;
 	struct regulator	*vpcie;
+	struct regulator	*vph;
 	void __iomem		*phy_base;
 
 	/* power domain for pcie */
@@ -621,6 +623,17 @@ static void imx6_pcie_init_phy(struct imx6_pcie *imx6_pcie)
 				   imx6_pcie_grp_offset(imx6_pcie),
 				   IMX8MQ_GPR_PCIE_REF_USE_PAD,
 				   IMX8MQ_GPR_PCIE_REF_USE_PAD);
+		/*
+		 * Regarding the datasheet, the PCIE_VPH is suggested
+		 * to be 1.8V. If the PCIE_VPH is supplied by 3.3V, the
+		 * VREG_BYPASS should be cleared to zero.
+		 */
+		if (imx6_pcie->vph &&
+		    regulator_get_voltage(imx6_pcie->vph) > 3000000)
+			regmap_update_bits(imx6_pcie->iomuxc_gpr,
+					   imx6_pcie_grp_offset(imx6_pcie),
+					   IMX8MQ_GPR_PCIE_VREG_BYPASS,
+					   0);
 		break;
 	case IMX7D:
 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,
@@ -1130,6 +1143,13 @@ static int imx6_pcie_probe(struct platform_device *pdev)
 		imx6_pcie->vpcie = NULL;
 	}
 
+	imx6_pcie->vph = devm_regulator_get_optional(&pdev->dev, "vph");
+	if (IS_ERR(imx6_pcie->vph)) {
+		if (PTR_ERR(imx6_pcie->vph) != -ENODEV)
+			return PTR_ERR(imx6_pcie->vph);
+		imx6_pcie->vph = NULL;
+	}
+
 	platform_set_drvdata(pdev, imx6_pcie);
 
 	ret = imx6_pcie_attach_pd(dev);
-- 
2.17.1
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RE: [EXT] Re: [RESEND v4 2/2] PCI: imx: clear vreg bypass when pcie vph voltage is 3v3

From: Richard Zhu <hongxing.zhu@nxp.com>
Date: 2021-05-14 08:37:02

Hi Bjorn:
It seems that the email I replied on May07, is missing.
Re-send it.

Best Regards
Richard Zhu
-----Original Message-----
From: Bjorn Helgaas <helgaas@kernel.org>
Sent: Friday, May 7, 2021 5:09 AM
To: Richard Zhu <hongxing.zhu@nxp.com>
Cc: l.stach@pengutronix.de; andrew.smirnov@gmail.com;
shawnguo@kernel.org; kw@linux.com; bhelgaas@google.com;
stefan@agner.ch; lorenzo.pieralisi@arm.com; linux-pci@vger.kernel.org;
dl-linux-imx [off-list ref]; linux-arm-kernel@lists.infradead.org;
linux-kernel@vger.kernel.org; kernel@pengutronix.de
Subject: [EXT] Re: [RESEND v4 2/2] PCI: imx: clear vreg bypass when pcie vph
voltage is 3v3

Caution: EXT Email

On Tue, Mar 30, 2021 at 04:08:21PM +0800, Richard Zhu wrote:
quoted
Both 1.8v and 3.3v power supplies can be used by i.MX8MQ PCIe PHY.
In default, the PCIE_VPH voltage is suggested to be 1.8v refer to data
sheet. When PCIE_VPH is supplied by 3.3v in the HW schematic design,
the VREG_BYPASS bits of GPR registers should be cleared from default
value 1b'1 to 1b'0. Thus, the internal 3v3 to 1v8 translator would be
turned on.
Maybe something like this?

  PCI: imx6: Enable PHY internal regulator when supplied >3V

  The i.MX8MQ PCIe PHY needs 1.8V but can by supplied by either a 1.8V
  or a 3.3V regulator.

  The "vph-supply" DT property tells us which external regulator
  supplies the PHY.  If that regulator supplies anything over 3V,
  enable the PHY's internal 3.3V-to-1.8V regulator.
[Richard Zhu] Hi Bjorn:
Thanks for your comments.
vph is the "high-voltage power supply" of the PHY.
How do you think with the following one with some minor updates?

   PCI: imx6: Enable PHY internal regulator when supplied >3V

   The i.MX8MQ PCIe PHY needs 1.8V in default but can be supplied by
   either a 1.8V or a 3.3V regulator.

   The "vph-supply" DT property tells us which external regulator
   supplies the PHY. If that regulator supplies anything over 3V,
   enable the PHY's internal 3.3V-to-1.8V regulator.
BR
Richard
quoted
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
---
 drivers/pci/controller/dwc/pci-imx6.c | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)
diff --git a/drivers/pci/controller/dwc/pci-imx6.c
b/drivers/pci/controller/dwc/pci-imx6.c
index 853ea8e82952..94b43b4ecca1 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -37,6 +37,7 @@
 #define IMX8MQ_GPR_PCIE_REF_USE_PAD          BIT(9)
 #define IMX8MQ_GPR_PCIE_CLK_REQ_OVERRIDE_EN  BIT(10)
 #define IMX8MQ_GPR_PCIE_CLK_REQ_OVERRIDE     BIT(11)
+#define IMX8MQ_GPR_PCIE_VREG_BYPASS          BIT(12)
 #define IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE  GENMASK(11, 8)
 #define IMX8MQ_PCIE2_BASE_ADDR
0x33c00000
quoted
@@ -80,6 +81,7 @@ struct imx6_pcie {
      u32                     tx_swing_full;
      u32                     tx_swing_low;
      struct regulator        *vpcie;
+     struct regulator        *vph;
      void __iomem            *phy_base;

      /* power domain for pcie */
@@ -621,6 +623,17 @@ static void imx6_pcie_init_phy(struct imx6_pcie
*imx6_pcie)
quoted
                                 imx6_pcie_grp_offset(imx6_pcie),
IMX8MQ_GPR_PCIE_REF_USE_PAD,
quoted
IMX8MQ_GPR_PCIE_REF_USE_PAD);
quoted
+             /*
+              * Regarding the datasheet, the PCIE_VPH is suggested
+              * to be 1.8V. If the PCIE_VPH is supplied by 3.3V, the
+              * VREG_BYPASS should be cleared to zero.
+              */
+             if (imx6_pcie->vph &&
+                 regulator_get_voltage(imx6_pcie->vph) > 3000000)
+                     regmap_update_bits(imx6_pcie->iomuxc_gpr,
+
imx6_pcie_grp_offset(imx6_pcie),
quoted
+
IMX8MQ_GPR_PCIE_VREG_BYPASS,
quoted
+                                        0);
              break;
      case IMX7D:
              regmap_update_bits(imx6_pcie->iomuxc_gpr,
IOMUXC_GPR12,
quoted
@@ -1130,6 +1143,13 @@ static int imx6_pcie_probe(struct
platform_device *pdev)
quoted
              imx6_pcie->vpcie = NULL;
      }

+     imx6_pcie->vph = devm_regulator_get_optional(&pdev->dev,
"vph");
quoted
+     if (IS_ERR(imx6_pcie->vph)) {
+             if (PTR_ERR(imx6_pcie->vph) != -ENODEV)
+                     return PTR_ERR(imx6_pcie->vph);
+             imx6_pcie->vph = NULL;
+     }
+
      platform_set_drvdata(pdev, imx6_pcie);

      ret = imx6_pcie_attach_pd(dev);
--
2.17.1
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[RESEND v4 1/2] dt-bindings: imx6q-pcie: add one regulator used to power up pcie phy

From: Richard Zhu <hongxing.zhu@nxp.com>
Date: 2021-03-30 08:23:17

Both 1.8v and 3.3v power supplies can be used by i.MX8MQ PCIe PHY.
In default, the PCIE_VPH voltage is suggested to be 1.8v refer to data
sheet. When PCIE_VPH is supplied by 3.3v in the HW schematic design,
the VREG_BYPASS bits of GPR registers should be cleared from default
value 1b'1 to 1b'0. Thus, the internal 3v3 to 1v8 translator would be
turned on.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
---
 Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt | 3 +++
 1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt
index de4b2baf91e8..d8971ab99274 100644
--- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt
+++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt
@@ -38,6 +38,9 @@ Optional properties:
   The regulator will be enabled when initializing the PCIe host and
   disabled either as part of the init process or when shutting down the
   host.
+- vph-supply: Should specify the regulator in charge of VPH one of the three
+  PCIe PHY powers. This regulator can be supplied by both 1.8v and 3.3v voltage
+  supplies.
 
 Additional required properties for imx6sx-pcie:
 - clock names: Must include the following additional entries:
-- 
2.17.1


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Re: [RESEND v4 1/2] dt-bindings: imx6q-pcie: add one regulator used to power up pcie phy

From: Lucas Stach <l.stach@pengutronix.de>
Date: 2021-05-06 16:08:36

Hi Lorenzo,

have those two patches fallen through some crack? AFAICS they are gone
from patchwork, but I also can't find them in any branch in the usual
git repos.

Regards,
Lucas

Am Dienstag, dem 30.03.2021 um 16:08 +0800 schrieb Richard Zhu:
quoted hunk
Both 1.8v and 3.3v power supplies can be used by i.MX8MQ PCIe PHY.
In default, the PCIE_VPH voltage is suggested to be 1.8v refer to data
sheet. When PCIE_VPH is supplied by 3.3v in the HW schematic design,
the VREG_BYPASS bits of GPR registers should be cleared from default
value 1b'1 to 1b'0. Thus, the internal 3v3 to 1v8 translator would be
turned on.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
---
 Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt | 3 +++
 1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt
index de4b2baf91e8..d8971ab99274 100644
--- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt
+++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt
@@ -38,6 +38,9 @@ Optional properties:
   The regulator will be enabled when initializing the PCIe host and
   disabled either as part of the init process or when shutting down the
   host.
+- vph-supply: Should specify the regulator in charge of VPH one of the three
+  PCIe PHY powers. This regulator can be supplied by both 1.8v and 3.3v voltage
+  supplies.
 

 Additional required properties for imx6sx-pcie:
 - clock names: Must include the following additional entries:


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Re: [RESEND v4 1/2] dt-bindings: imx6q-pcie: add one regulator used to power up pcie phy

From: Bjorn Helgaas <helgaas@kernel.org>
Date: 2021-05-06 21:01:23

On Thu, May 06, 2021 at 06:08:24PM +0200, Lucas Stach wrote:
Hi Lorenzo,

have those two patches fallen through some crack? AFAICS they are gone
from patchwork, but I also can't find them in any branch in the usual
git repos.
They were marked "accepted" in patchwork but must have fallen through
the cracks.  I reset them to "new" and assigned to Lorenzo.

Neither one follows the subject line capitalization conventions.

The subject line of this patch (1/2) doesn't really make sense.  I
*think* this adds a property ("vph-supply") to indicate which
regulator supplys power to the PHY.
Am Dienstag, dem 30.03.2021 um 16:08 +0800 schrieb Richard Zhu:
quoted
Both 1.8v and 3.3v power supplies can be used by i.MX8MQ PCIe PHY.
In default, the PCIE_VPH voltage is suggested to be 1.8v refer to data
sheet. When PCIE_VPH is supplied by 3.3v in the HW schematic design,
the VREG_BYPASS bits of GPR registers should be cleared from default
value 1b'1 to 1b'0. Thus, the internal 3v3 to 1v8 translator would be
turned on.
This commit log doesn't describe the patch, either.  Maybe something
like this:

  dt-bindings: imx6q-pcie: Add "vph-supply" for PHY supply voltage

  The i.MX8MQ PCIe PHY can use either a 1.8V or a 3.3V power supply.
  Add a "vph-supply" property to indicate which regulator supplies
  power for the PHY.
quoted
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
---
 Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt | 3 +++
 1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt
index de4b2baf91e8..d8971ab99274 100644
--- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt
+++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt
@@ -38,6 +38,9 @@ Optional properties:
   The regulator will be enabled when initializing the PCIe host and
   disabled either as part of the init process or when shutting down the
   host.
+- vph-supply: Should specify the regulator in charge of VPH one of the three
+  PCIe PHY powers. This regulator can be supplied by both 1.8v and 3.3v voltage
+  supplies.
Just going by examples for other drivers, I think this should say
something like this:

  - vph-supply: Regulator for i.MX8MQ PCIe PHY.  May supply either
    1.8V or 3.3V.

You mentioned "one of the three PCIe PHY powers"; I don't know what
that means, so I don't know whether it's important to include.

I also don't know what "vph" means; if the "ph" is part of "phy", it'd
be nicer to include the "y", so it would be "vphy-supply".
quoted
 Additional required properties for imx6sx-pcie:
 - clock names: Must include the following additional entries:
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RE: [EXT] Re: [RESEND v4 1/2] dt-bindings: imx6q-pcie: add one regulator used to power up pcie phy

From: Richard Zhu <hongxing.zhu@nxp.com>
Date: 2021-05-14 08:35:56

Hi Bjorn:
It seems that the email I replied on May07, is missing.
Re-send it again.

Best Regards
Richard Zhu
-----Original Message-----
From: Bjorn Helgaas <helgaas@kernel.org>
Sent: Friday, May 7, 2021 5:01 AM
To: Lucas Stach <l.stach@pengutronix.de>
Cc: lorenzo.pieralisi@arm.com; linux-pci@vger.kernel.org; dl-linux-imx
[off-list ref]; linux-arm-kernel@lists.infradead.org;
linux-kernel@vger.kernel.org; kernel@pengutronix.de; Richard Zhu
[off-list ref]; andrew.smirnov@gmail.com;
shawnguo@kernel.org; kw@linux.com; bhelgaas@google.com;
stefan@agner.ch
Subject: [EXT] Re: [RESEND v4 1/2] dt-bindings: imx6q-pcie: add one
regulator used to power up pcie phy
On Thu, May 06, 2021 at 06:08:24PM +0200, Lucas Stach wrote:
quoted
Hi Lorenzo,

have those two patches fallen through some crack? AFAICS they are gone
from patchwork, but I also can't find them in any branch in the usual
git repos.
They were marked "accepted" in patchwork but must have fallen through the
cracks.  I reset them to "new" and assigned to Lorenzo.

Neither one follows the subject line capitalization conventions.

The subject line of this patch (1/2) doesn't really make sense.  I
*think* this adds a property ("vph-supply") to indicate which regulator supplys
power to the PHY.
quoted
Am Dienstag, dem 30.03.2021 um 16:08 +0800 schrieb Richard Zhu:
quoted
Both 1.8v and 3.3v power supplies can be used by i.MX8MQ PCIe PHY.
In default, the PCIE_VPH voltage is suggested to be 1.8v refer to
data sheet. When PCIE_VPH is supplied by 3.3v in the HW schematic
design, the VREG_BYPASS bits of GPR registers should be cleared from
default value 1b'1 to 1b'0. Thus, the internal 3v3 to 1v8 translator
would be turned on.
This commit log doesn't describe the patch, either.  Maybe something like
this:

  dt-bindings: imx6q-pcie: Add "vph-supply" for PHY supply voltage

  The i.MX8MQ PCIe PHY can use either a 1.8V or a 3.3V power supply.
  Add a "vph-supply" property to indicate which regulator supplies
  power for the PHY.
[Richard Zhu] I'm fine with this one.
quoted
quoted
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
---
 Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt | 3 +++
 1 file changed, 3 insertions(+)

diff --git
a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt
b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt
index de4b2baf91e8..d8971ab99274 100644
--- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt
+++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt
@@ -38,6 +38,9 @@ Optional properties:
   The regulator will be enabled when initializing the PCIe host and
   disabled either as part of the init process or when shutting down the
   host.
+- vph-supply: Should specify the regulator in charge of VPH one of
+the three
+  PCIe PHY powers. This regulator can be supplied by both 1.8v and
+3.3v voltage
+  supplies.
Just going by examples for other drivers, I think this should say something like
this:

  - vph-supply: Regulator for i.MX8MQ PCIe PHY.  May supply either
    1.8V or 3.3V.

You mentioned "one of the three PCIe PHY powers"; I don't know what that
means, so I don't know whether it's important to include.

I also don't know what "vph" means; if the "ph" is part of "phy", it'd be nicer
to include the "y", so it would be "vphy-supply".
[Richard Zhu] There are three power supplies in total required by the PHY.
- vp: PHY analog and digital supply
- vptxN: PHY transmit supply
-vph: High-voltage power supply.
Only vph is handled by SW here.

BR
Richard
quoted
quoted
 Additional required properties for imx6sx-pcie:
 - clock names: Must include the following additional entries:
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