[PATCH V2] cpufreq: Rudimentary typos fix in the file s5pv210-cpufreq.c

Subsystems: arm/samsung s3c, s5p and exynos arm architectures, cpu frequency scaling framework, the rest

STALE1967d

6 messages, 3 authors, 2021-03-13 · open the first message on its own page

[PATCH V2] cpufreq: Rudimentary typos fix in the file s5pv210-cpufreq.c

From: Bhaskar Chowdhury <hidden>
Date: 2021-03-12 23:29:43

s/untile/until/
s/souce/source/
s/divier/divider/

Signed-off-by: Bhaskar Chowdhury <redacted>
---
 Changes from V1:
   Krzysztof spotted a grammatical flaw left over ...so corrected..

 drivers/cpufreq/s5pv210-cpufreq.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/cpufreq/s5pv210-cpufreq.c b/drivers/cpufreq/s5pv210-cpufreq.c
index 69786e5bbf05..af1ac3f6e4b8 100644
--- a/drivers/cpufreq/s5pv210-cpufreq.c
+++ b/drivers/cpufreq/s5pv210-cpufreq.c
@@ -378,7 +378,7 @@ static int s5pv210_target(struct cpufreq_policy *policy, unsigned int index)
 		/*
 		 * 6. Turn on APLL
 		 * 6-1. Set PMS values
-		 * 6-2. Wait untile the PLL is locked
+		 * 6-2. Wait until the PLL is locked
 		 */
 		if (index == L0)
 			writel_relaxed(APLL_VAL_1000, S5P_APLL_CON);
@@ -390,7 +390,7 @@ static int s5pv210_target(struct cpufreq_policy *policy, unsigned int index)
 		} while (!(reg & (0x1 << 29)));

 		/*
-		 * 7. Change souce clock from SCLKMPLL(667Mhz)
+		 * 7. Change source clock from SCLKMPLL(667Mhz)
 		 * to SCLKA2M(200Mhz) in MFC_MUX and G3D MUX
 		 * (667/4=166)->(200/4=50)Mhz
 		 */
@@ -439,7 +439,7 @@ static int s5pv210_target(struct cpufreq_policy *policy, unsigned int index)
 	}

 	/*
-	 * L4 level need to change memory bus speed, hence onedram clock divier
+	 * L4 level needs to change memory bus speed, hence onedram clock divider
 	 * and memory refresh parameter should be changed
 	 */
 	if (bus_speed_changing) {
--
2.26.2


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Re: [PATCH V2] cpufreq: Rudimentary typos fix in the file s5pv210-cpufreq.c

From: Tom Saeger <hidden>
Date: 2021-03-13 00:18:17

On Sat, Mar 13, 2021 at 04:56:21AM +0530, Bhaskar Chowdhury wrote:

sent a few additional typo fixes to your V1, can you add those to your patch?

Regards,

--Tom

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Re: [PATCH V2] cpufreq: Rudimentary typos fix in the file s5pv210-cpufreq.c

From: Bhaskar Chowdhury <hidden>
Date: 2021-03-13 00:52:06

On 17:16 Fri 12 Mar 2021, Tom Saeger wrote:
On Sat, Mar 13, 2021 at 04:56:21AM +0530, Bhaskar Chowdhury wrote:

sent a few additional typo fixes to your V1, can you add those to your patch?

Regards,

--Tom
Thanks, I have already sent out a V2 in public...I might make a V3 with your
changes too...did you sent it to ???

Re: [PATCH V2] cpufreq: Rudimentary typos fix in the file s5pv210-cpufreq.c

From: Randy Dunlap <hidden>
Date: 2021-03-13 00:58:05

On 3/12/21 4:50 PM, Bhaskar Chowdhury wrote:
On 17:16 Fri 12 Mar 2021, Tom Saeger wrote:
quoted
On Sat, Mar 13, 2021 at 04:56:21AM +0530, Bhaskar Chowdhury wrote:

sent a few additional typo fixes to your V1, can you add those to your patch?

Regards,

--Tom
Thanks, I have already sent out a V2 in public...I might make a V3 with your
changes too...did you sent it to ???
It was just a reply to your v1 patch.

-- 
~Randy


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Re: [PATCH V2] cpufreq: Rudimentary typos fix in the file s5pv210-cpufreq.c

From: Tom Saeger <hidden>
Date: 2021-03-13 03:02:41

On Fri, Mar 12, 2021 at 04:57:07PM -0800, Randy Dunlap wrote:
On 3/12/21 4:50 PM, Bhaskar Chowdhury wrote:
quoted
On 17:16 Fri 12 Mar 2021, Tom Saeger wrote:
quoted
On Sat, Mar 13, 2021 at 04:56:21AM +0530, Bhaskar Chowdhury wrote:

sent a few additional typo fixes to your V1, can you add those to your patch?

Regards,

--Tom
Thanks, I have already sent out a V2 in public...I might make a V3 with your
changes too...did you sent it to ???
It was just a reply to your v1 patch.

-- 
~Randy
Bhaskar,

Here you go...

V2 additions:
diff --git a/drivers/cpufreq/s5pv210-cpufreq.c b/drivers/cpufreq/s5pv210-cpufreq.c
index af1ac3f6e4b8..73110b005716 100644
--- a/drivers/cpufreq/s5pv210-cpufreq.c
+++ b/drivers/cpufreq/s5pv210-cpufreq.c
@@ -91,7 +91,7 @@ static DEFINE_MUTEX(set_freq_lock);
 /* Use 800MHz when entering sleep mode */
 #define SLEEP_FREQ     (800 * 1000)

-/* Tracks if cpu freqency can be updated anymore */
+/* Tracks if cpu frequency can be updated anymore */
 static bool no_cpufreq_access;

 /*
@@ -190,7 +190,7 @@ static u32 clkdiv_val[5][11] = {

 /*
  * This function set DRAM refresh counter
- * accoriding to operating frequency of DRAM
+ * according to operating frequency of DRAM
  * ch: DMC port number 0 or 1
  * freq: Operating frequency of DRAM(KHz)
  */
@@ -320,7 +320,7 @@ static int s5pv210_target(struct cpufreq_policy *policy, unsigned int index)

                /*
                 * 3. DMC1 refresh count for 133Mhz if (index == L4) is
-                * true refresh counter is already programed in upper
+                * true refresh counter is already programmed in upper
                 * code. 0x287@83Mhz
                 */
                if (!bus_speed_changing)

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Re: [PATCH V2] cpufreq: Rudimentary typos fix in the file s5pv210-cpufreq.c

From: Bhaskar Chowdhury <hidden>
Date: 2021-03-13 04:04:25

On 19:59 Fri 12 Mar 2021, Tom Saeger wrote:
quoted hunk
On Fri, Mar 12, 2021 at 04:57:07PM -0800, Randy Dunlap wrote:
quoted
On 3/12/21 4:50 PM, Bhaskar Chowdhury wrote:
quoted
On 17:16 Fri 12 Mar 2021, Tom Saeger wrote:
quoted
On Sat, Mar 13, 2021 at 04:56:21AM +0530, Bhaskar Chowdhury wrote:

sent a few additional typo fixes to your V1, can you add those to your patch?

Regards,

--Tom
Thanks, I have already sent out a V2 in public...I might make a V3 with your
changes too...did you sent it to ???
It was just a reply to your v1 patch.

--
~Randy
Bhaskar,

Here you go...

V2 additions:
diff --git a/drivers/cpufreq/s5pv210-cpufreq.c b/drivers/cpufreq/s5pv210-cpufreq.c
index af1ac3f6e4b8..73110b005716 100644
--- a/drivers/cpufreq/s5pv210-cpufreq.c
+++ b/drivers/cpufreq/s5pv210-cpufreq.c
@@ -91,7 +91,7 @@ static DEFINE_MUTEX(set_freq_lock);
/* Use 800MHz when entering sleep mode */
#define SLEEP_FREQ     (800 * 1000)

-/* Tracks if cpu freqency can be updated anymore */
+/* Tracks if cpu frequency can be updated anymore */
static bool no_cpufreq_access;

/*
@@ -190,7 +190,7 @@ static u32 clkdiv_val[5][11] = {
/*
 * This function set DRAM refresh counter
- * accoriding to operating frequency of DRAM
+ * according to operating frequency of DRAM
 * ch: DMC port number 0 or 1
 * freq: Operating frequency of DRAM(KHz)
 */
@@ -320,7 +320,7 @@ static int s5pv210_target(struct cpufreq_policy *policy, unsigned int index)

               /*
                * 3. DMC1 refresh count for 133Mhz if (index == L4) is
-                * true refresh counter is already programed in upper
+                * true refresh counter is already programmed in upper
                * code. 0x287@83Mhz
                */
               if (!bus_speed_changing)
Tom,

I sent out an V3 incorporated with your findings.

Thanks,
Bhaskar
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