changes v2:
- rebase against latest kernel
- fix networking on RIoTBoard
This patch series tries to remove most of the imx6 and imx7 board
specific PHY configuration via fixup, as this breaks the PHYs when
connected to switch chips or USB Ethernet MACs.
Each patch has the possibility to break boards, but contains a
recommendation to fix the problem in a more portable and future-proof
way.
regards,
Oleksij
Oleksij Rempel (7):
ARM: imx6q: remove PHY fixup for KSZ9031
ARM: imx6q: remove TX clock delay of ar8031_phy_fixup()
ARM: imx6q: remove hand crafted PHY power up in ar8035_phy_fixup()
ARM: imx6q: remove clk-out fixup for the Atheros AR8031 and AR8035
PHYs
ARM: imx6q: remove Atheros AR8035 SmartEEE fixup
ARM: imx6sx: remove Atheros AR8031 PHY fixup
ARM: imx7d: remove Atheros AR8031 PHY fixup
arch/arm/boot/dts/imx6dl-riotboard.dts | 2 +
arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts | 2 +-
arch/arm/mach-imx/mach-imx6q.c | 85 -------------------------
arch/arm/mach-imx/mach-imx6sx.c | 26 --------
arch/arm/mach-imx/mach-imx7d.c | 22 -------
5 files changed, 3 insertions(+), 134 deletions(-)
--
2.29.2
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In case the at803x PHY driver is activated in the kernel, the TX clock
fixup is overwritten by at803x_config_init(), in this case no additional
device tree changes are needed.
If this patch breaks your system, please enable AT803X_PHY driver and
add the following device tree property to the PHY node:
phy-mode = "rgmii-txid";
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
---
arch/arm/mach-imx/mach-imx6q.c | 6 ------
1 file changed, 6 deletions(-)
This fixup removes the Lpi_en bit.
If this patch breaks functionality of your board, use following device
tree properties: qca,smarteee-tw-us-1g and qca,smarteee-tw-us-100m.
For example:
ethernet-phy@X {
reg = <0xX>;
qca,smarteee-tw-us-1g = <24>;
....
};
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
---
arch/arm/mach-imx/mach-imx6q.c | 21 ---------------------
1 file changed, 21 deletions(-)
The at803x_resume() handler in the at803x.c PHY driver powers up the PHY
properly, so remove this fixup.
If this patch breaks your system, enable the AT803X_PHY driver.
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
---
arch/arm/mach-imx/mach-imx6q.c | 5 -----
1 file changed, 5 deletions(-)
Starting with:
bcf3440c6dd7 ("net: phy: micrel: add phy-mode support for the KSZ9031 PHY")
the micrel phy driver started respecting phy-mode for the KSZ9031 PHY.
At least with kernel v5.8 configuration provided by this fixup was
overwritten by the micrel driver.
This fixup was providing following configuration:
RX path: 2.58ns delay
rx -0.42 (left shift) + rx_clk +0.96ns (right shift) =
1,38 + 1,2 internal RX delay = 2.58ns
TX path: 0.96ns delay
tx (no delay) + tx_clk 0.96ns (right shift) = 0.96ns
This configuration is outside of the recommended RGMII clock skew delays
and about in the middle of: rgmii-idrx and rgmii-id
Since most embedded systems do not have enough place to introduce
significant clock skew, rgmii-id is the way to go.
In case this patch breaks network functionality on your system, build
kernel with enabled MICREL_PHY. If it is still not working then try
following device tree options:
1. Set (or change) phy-mode in DT to:
phy-mode = "rgmii-id";
This actives internal delay for both RX and TX.
1. Set (or change) phy-mode in DT to:
phy-mode = "rgmii-idrx";
This actives internal delay for RX only.
3. Use following DT properties:
phy-mode = "rgmii";
txen-skew-psec = <0>;
rxdv-skew-psec = <0>;
rxd0-skew-psec = <0>;
rxd1-skew-psec = <0>;
rxd2-skew-psec = <0>;
rxd3-skew-psec = <0>;
rxc-skew-psec = <1860>;
txc-skew-psec = <1860>;
This activates the internal delays for RX and TX, with the value as
the fixup that is removed in this patch.
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Acked-by: Philippe Schenker <redacted>
---
arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts | 2 +-
arch/arm/mach-imx/mach-imx6q.c | 23 -----------------------
2 files changed, 1 insertion(+), 24 deletions(-)
On Tue, Mar 09, 2021 at 12:26:09PM +0100, Oleksij Rempel wrote:
Starting with:
bcf3440c6dd7 ("net: phy: micrel: add phy-mode support for the KSZ9031 PHY")
the micrel phy driver started respecting phy-mode for the KSZ9031 PHY.
At least with kernel v5.8 configuration provided by this fixup was
overwritten by the micrel driver.
This fixup was providing following configuration:
RX path: 2.58ns delay
rx -0.42 (left shift) + rx_clk +0.96ns (right shift) =
1,38 + 1,2 internal RX delay = 2.58ns
TX path: 0.96ns delay
tx (no delay) + tx_clk 0.96ns (right shift) = 0.96ns
This configuration is outside of the recommended RGMII clock skew delays
and about in the middle of: rgmii-idrx and rgmii-id
Since most embedded systems do not have enough place to introduce
significant clock skew, rgmii-id is the way to go.
In case this patch breaks network functionality on your system, build
kernel with enabled MICREL_PHY. If it is still not working then try
following device tree options:
1. Set (or change) phy-mode in DT to:
phy-mode = "rgmii-id";
This actives internal delay for both RX and TX.
1. Set (or change) phy-mode in DT to:
phy-mode = "rgmii-idrx";
This actives internal delay for RX only.
3. Use following DT properties:
phy-mode = "rgmii";
txen-skew-psec = <0>;
rxdv-skew-psec = <0>;
rxd0-skew-psec = <0>;
rxd1-skew-psec = <0>;
rxd2-skew-psec = <0>;
rxd3-skew-psec = <0>;
rxc-skew-psec = <1860>;
txc-skew-psec = <1860>;
This activates the internal delays for RX and TX, with the value as
the fixup that is removed in this patch.
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Acked-by: Philippe Schenker <redacted>
---
arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts | 2 +-
arch/arm/mach-imx/mach-imx6q.c | 23 -----------------------
I have different branch for DTS and mach-imx change. Please split the
changes.
Shawn
This configuration should be set over device tree.
If this patch breaks network functionality on your system, enable the
AT803X_PHY driver and set following device tree property in the PHY
node:
qca,clk-out-frequency = <125000000>;
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
---
arch/arm/boot/dts/imx6dl-riotboard.dts | 2 ++
arch/arm/mach-imx/mach-imx6q.c | 30 --------------------------
2 files changed, 2 insertions(+), 30 deletions(-)
Hi Shawn,
ping, do this patches need some ACK from some one?
Regards,
Oleksij
On Tue, Mar 09, 2021 at 12:26:08PM +0100, Oleksij Rempel wrote:
changes v2:
- rebase against latest kernel
- fix networking on RIoTBoard
This patch series tries to remove most of the imx6 and imx7 board
specific PHY configuration via fixup, as this breaks the PHYs when
connected to switch chips or USB Ethernet MACs.
Each patch has the possibility to break boards, but contains a
recommendation to fix the problem in a more portable and future-proof
way.
regards,
Oleksij
Oleksij Rempel (7):
ARM: imx6q: remove PHY fixup for KSZ9031
ARM: imx6q: remove TX clock delay of ar8031_phy_fixup()
ARM: imx6q: remove hand crafted PHY power up in ar8035_phy_fixup()
ARM: imx6q: remove clk-out fixup for the Atheros AR8031 and AR8035
PHYs
ARM: imx6q: remove Atheros AR8035 SmartEEE fixup
ARM: imx6sx: remove Atheros AR8031 PHY fixup
ARM: imx7d: remove Atheros AR8031 PHY fixup
arch/arm/boot/dts/imx6dl-riotboard.dts | 2 +
arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts | 2 +-
arch/arm/mach-imx/mach-imx6q.c | 85 -------------------------
arch/arm/mach-imx/mach-imx6sx.c | 26 --------
arch/arm/mach-imx/mach-imx7d.c | 22 -------
5 files changed, 3 insertions(+), 134 deletions(-)
--
2.29.2
On Wed, Mar 24, 2021 at 06:54:24AM +0100, Oleksij Rempel wrote:
Hi Shawn,
ping, do this patches need some ACK from some one?
As this will break existing DTBs, I need more ACKs from people to see
the consensus that this is the right thing to do.
Shawn
Regards,
Oleksij
On Tue, Mar 09, 2021 at 12:26:08PM +0100, Oleksij Rempel wrote:
quoted
changes v2:
- rebase against latest kernel
- fix networking on RIoTBoard
This patch series tries to remove most of the imx6 and imx7 board
specific PHY configuration via fixup, as this breaks the PHYs when
connected to switch chips or USB Ethernet MACs.
Each patch has the possibility to break boards, but contains a
recommendation to fix the problem in a more portable and future-proof
way.
regards,
Oleksij
Oleksij Rempel (7):
ARM: imx6q: remove PHY fixup for KSZ9031
ARM: imx6q: remove TX clock delay of ar8031_phy_fixup()
ARM: imx6q: remove hand crafted PHY power up in ar8035_phy_fixup()
ARM: imx6q: remove clk-out fixup for the Atheros AR8031 and AR8035
PHYs
ARM: imx6q: remove Atheros AR8035 SmartEEE fixup
ARM: imx6sx: remove Atheros AR8031 PHY fixup
ARM: imx7d: remove Atheros AR8031 PHY fixup
arch/arm/boot/dts/imx6dl-riotboard.dts | 2 +
arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts | 2 +-
arch/arm/mach-imx/mach-imx6q.c | 85 -------------------------
arch/arm/mach-imx/mach-imx6sx.c | 26 --------
arch/arm/mach-imx/mach-imx7d.c | 22 -------
5 files changed, 3 insertions(+), 134 deletions(-)
--
2.29.2
Hi Oleksij,
On Tue, Mar 9, 2021 at 8:26 AM Oleksij Rempel [off-list ref] wrote:
changes v2:
- rebase against latest kernel
- fix networking on RIoTBoard
This patch series tries to remove most of the imx6 and imx7 board
specific PHY configuration via fixup, as this breaks the PHYs when
connected to switch chips or USB Ethernet MACs.
Each patch has the possibility to break boards, but contains a
recommendation to fix the problem in a more portable and future-proof
way.
I think this series moves us in the right direction, even with the
possibility to break old dtb's.
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Andrew, what do you think?
Thanks
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From: Andrew Lunn <andrew@lunn.ch> Date: 2021-03-30 14:31:14
On Tue, Mar 30, 2021 at 11:00:52AM -0300, Fabio Estevam wrote:
Hi Oleksij,
On Tue, Mar 9, 2021 at 8:26 AM Oleksij Rempel [off-list ref] wrote:
quoted
changes v2:
- rebase against latest kernel
- fix networking on RIoTBoard
This patch series tries to remove most of the imx6 and imx7 board
specific PHY configuration via fixup, as this breaks the PHYs when
connected to switch chips or USB Ethernet MACs.
Each patch has the possibility to break boards, but contains a
recommendation to fix the problem in a more portable and future-proof
way.
I think this series moves us in the right direction, even with the
possibility to break old dtb's.
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Andrew, what do you think?
Hi Fabio
I think it should be merged, and we fixup anything which does break.
We are probably at the point where more is broken by not merging it
than merging it.
Andrew
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Hi Andrew,
On Tue, Mar 30, 2021 at 11:30 AM Andrew Lunn [off-list ref] wrote:
Hi Fabio
I think it should be merged, and we fixup anything which does break.
We are probably at the point where more is broken by not merging it
than merging it.
Thanks for your feedback. I agree.
Shawn wants to collect some Acked-by for this series.
Could you please give your Acked-by for this series?
Thanks
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Hello,
On Tue, Mar 30, 2021 at 12:04:50PM -0300, Fabio Estevam wrote:
Hi Andrew,
On Tue, Mar 30, 2021 at 11:30 AM Andrew Lunn [off-list ref] wrote:
quoted
Hi Fabio
I think it should be merged, and we fixup anything which does break.
We are probably at the point where more is broken by not merging it
than merging it.
Thanks for your feedback. I agree.
Shawn wants to collect some Acked-by for this series.
Could you please give your Acked-by for this series?
Andrew, can you please add you ACK?
Shawn will it be enough or you need more ACKs?
Regards,
Oleksij
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From: Lucas Stach <l.stach@pengutronix.de> Date: 2021-04-13 10:01:01
Hi all,
Am Dienstag, dem 09.03.2021 um 12:26 +0100 schrieb Oleksij Rempel:
changes v2:
- rebase against latest kernel
- fix networking on RIoTBoard
This patch series tries to remove most of the imx6 and imx7 board
specific PHY configuration via fixup, as this breaks the PHYs when
connected to switch chips or USB Ethernet MACs.
Each patch has the possibility to break boards, but contains a
recommendation to fix the problem in a more portable and future-proof
way.
I agree with the opinion that those PHY fixups introduce more harm than
good. Essentially they are pushing board specific configuration values
into the PHY, without any checks that the fixup is even running on the
specific board it was targeted at.
While there is a real chance to break some out of tree boards or
incomplete configs I think that's something we can accept here. If
someone makes a case why they can absolutely not fixup their DT or
kernel config we could even bring back some of those fixups with a
proper board compatible check to avoid mashing things up for other
boards with the same PHY. I guess the only realistic way to learn if
someone can make such a case is to apply this series and look for any
fallout.
So for what it is worth:
Acked-by: Lucas Stach <l.stach@pengutronix.de>
regards,
Oleksij
Oleksij Rempel (7):
ARM: imx6q: remove PHY fixup for KSZ9031
ARM: imx6q: remove TX clock delay of ar8031_phy_fixup()
ARM: imx6q: remove hand crafted PHY power up in ar8035_phy_fixup()
ARM: imx6q: remove clk-out fixup for the Atheros AR8031 and AR8035
PHYs
ARM: imx6q: remove Atheros AR8035 SmartEEE fixup
ARM: imx6sx: remove Atheros AR8031 PHY fixup
ARM: imx7d: remove Atheros AR8031 PHY fixup
arch/arm/boot/dts/imx6dl-riotboard.dts | 2 +
arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts | 2 +-
arch/arm/mach-imx/mach-imx6q.c | 85 -------------------------
arch/arm/mach-imx/mach-imx6sx.c | 26 --------
arch/arm/mach-imx/mach-imx7d.c | 22 -------
5 files changed, 3 insertions(+), 134 deletions(-)
From: Russell King - ARM Linux admin <linux@armlinux.org.uk> Date: 2021-04-13 10:51:56
On Tue, Apr 13, 2021 at 12:00:45PM +0200, Lucas Stach wrote:
I agree with the opinion that those PHY fixups introduce more harm than
good. Essentially they are pushing board specific configuration values
into the PHY, without any checks that the fixup is even running on the
specific board it was targeted at.
Yes and no. The problem is, that's an easy statement to make when one
doesn't understand what they're all doing.
Some are "board specific" in that the normal setup for e.g. iMX6 would
be to enable clock output from the AR8035 PHY and feed that into the
iMX6 - as far as I'm aware, that's the only working configuration for
that SoC and PHY. However, it's also true that this fixup should not
be applied unconditionally.
Then there's SmartEEE - it has been found that the PHY defaults for
this lead to link drops independent of the board and SoC that it is
connected to. It seems that the PHY is essentially broken - it powers
up with SmartEEE enabled, and when connected to another SmartEEE
supporting device, it seems guaranteed that it will result in link
drops in its default configuration.
Freescale's approach has apparently been to unconditionally disable
SmartEEE for all their platforms because of this. With a bit of
research however (as has been done by Jon and myself) we've found
that increasing the Tw parameter for 1G connections results in a
much more stable link.
So, just saying that these are bad without actually understanding what
they are doing is _also_ bad.
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From: Lucas Stach <l.stach@pengutronix.de> Date: 2021-04-13 11:11:07
Hi Russell,
sorry for the noise of this arriving in your inbox twice. Apparently I
messed up and replied in private in my last mail.
Am Dienstag, dem 13.04.2021 um 11:51 +0100 schrieb Russell King - ARM Linux admin:
On Tue, Apr 13, 2021 at 12:00:45PM +0200, Lucas Stach wrote:
quoted
I agree with the opinion that those PHY fixups introduce more harm than
good. Essentially they are pushing board specific configuration values
into the PHY, without any checks that the fixup is even running on the
specific board it was targeted at.
Yes and no. The problem is, that's an easy statement to make when one
doesn't understand what they're all doing.
Some are "board specific" in that the normal setup for e.g. iMX6 would
be to enable clock output from the AR8035 PHY and feed that into the
iMX6 - as far as I'm aware, that's the only working configuration for
that SoC and PHY. However, it's also true that this fixup should not
be applied unconditionally.
Then there's SmartEEE - it has been found that the PHY defaults for
this lead to link drops independent of the board and SoC that it is
connected to. It seems that the PHY is essentially broken - it powers
up with SmartEEE enabled, and when connected to another SmartEEE
supporting device, it seems guaranteed that it will result in link
drops in its default configuration.
Freescale's approach has apparently been to unconditionally disable
SmartEEE for all their platforms because of this. With a bit of
research however (as has been done by Jon and myself) we've found
that increasing the Tw parameter for 1G connections results in a
much more stable link.
So, just saying that these are bad without actually understanding what
they are doing is _also_ bad.
I'm not saying the fixups are bad per se. What I'm saying is that they
are inherently board specific and the right way to apply them is either
via DT properties, or if absolutely necessary via a fixup that at least
checks that it is running on the specific board it was targeted at.
While SmartEEE disabling will cause no big harm, aside from a bit more
power consumption, a wrong clock configuration can cause major
confusion. Especially if the configuration in DT and values put into
the PHY via fixups differ from each other.
Regards,
Lucas
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