This patch series adds support for two Ethernet ports on Allwinner R40.
R40 (aka V40,A40i,T3) has two different Ethernet IPs called EMAC and GMAC.
EMAC only support 10/100 Mbit in MII mode, while GMAC support both 10/100
(MII) and 10/100/1000 (RGMII).
In contrast to A10/A20 where GMAC and EMAC share the same pins making EMAC
somewhat pointless, on R40 EMAC can be routed to port H.
Both EMAC (on port H) and GMAC (on port A) can be then enabled at the same
time, allowing for two ethernet ports.
Evgeny Boger (2):
net: allwinner: reset control support
dts: r40: add second ethernet support
arch/arm/boot/dts/sun8i-r40.dtsi | 53 +++++++++++++++++++++
drivers/net/ethernet/allwinner/sun4i-emac.c | 21 +++++++-
2 files changed, 73 insertions(+), 1 deletion(-)
--
2.17.1
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R40 (aka V40, A40i, T3) has two different Ethernet IP
called EMAC and GMAC.
EMAC only support 10/100 Mbit in MII mode,
while GMAC support both 10/100 (MII) and 10/100/1000 (RGMII).
In contrast to A10/A20 where GMAC and EMAC share the same pins
making EMAC somewhat pointless, on R40 EMAC can be routed to port H.
Both EMAC (on port H) and GMAC (on port A)
can be then enabled at the same time, allowing for two ethernet ports.
Signed-off-by: Evgeny Boger <redacted>
---
arch/arm/boot/dts/sun8i-r40.dtsi | 53 ++++++++++++++++++++++++++++++++
1 file changed, 53 insertions(+)
R40 (aka V40/A40i/T3) and A10/A20 share the same EMAC IP.
However, on R40 the EMAC is gated by default.
Signed-off-by: Evgeny Boger <redacted>
---
drivers/net/ethernet/allwinner/sun4i-emac.c | 21 ++++++++++++++++++++-
1 file changed, 20 insertions(+), 1 deletion(-)
You should align this with the rest of the other fields
quoted hunk
phy_interface_t phy_interface;
};
@@ -791,6 +793,7 @@ static int emac_probe(struct platform_device *pdev) struct net_device *ndev; int ret = 0; const char *mac_addr;+ struct reset_control *reset; ndev = alloc_etherdev(sizeof(struct emac_board_info)); if (!ndev) {
@@ -852,6 +855,19 @@ static int emac_probe(struct platform_device *pdev) goto out_release_sram; }+ reset = devm_reset_control_get_optional_exclusive(&pdev->dev, NULL);+ if (IS_ERR(reset)) {+ dev_err(&pdev->dev, "unable to request reset\n");+ ret = -ENODEV;+ goto out_release_sram;+ }
Judging from your commit log, it's not really optional for the R40. The
way we usually deal with this is to have a structure associated with a
new compatible and have a flag tell if that compatible requires a reset
line or not.
The dt binding should also be amended to allow the reset property
+ db->reset = reset;
+ ret = reset_control_deassert(db->reset);
+ if (ret) {
+ dev_err(&pdev->dev, "could not deassert EMAC reset\n");
+ goto out_release_sram;
+ }
+
The programming guidelines in the datasheet ask that the reset line must
be deasserted before the clock in enabled.
Maxime
From: Maxime Ripard <hidden> Date: 2021-03-08 13:38:51
Hi,
On Sun, Mar 07, 2021 at 06:13:53AM +0300, Evgeny Boger wrote:
quoted hunk
R40 (aka V40, A40i, T3) has two different Ethernet IP
called EMAC and GMAC.
EMAC only support 10/100 Mbit in MII mode,
while GMAC support both 10/100 (MII) and 10/100/1000 (RGMII).
In contrast to A10/A20 where GMAC and EMAC share the same pins
making EMAC somewhat pointless, on R40 EMAC can be routed to port H.
Both EMAC (on port H) and GMAC (on port A)
can be then enabled at the same time, allowing for two ethernet ports.
Signed-off-by: Evgeny Boger <redacted>
---
arch/arm/boot/dts/sun8i-r40.dtsi | 53 ++++++++++++++++++++++++++++++++
1 file changed, 53 insertions(+)
You should align this with the rest of the other fields
quoted
phy_interface_t phy_interface;
};
@@ -791,6 +793,7 @@ static int emac_probe(struct platform_device *pdev) struct net_device *ndev; int ret = 0; const char *mac_addr;+ struct reset_control *reset; ndev = alloc_etherdev(sizeof(struct emac_board_info)); if (!ndev) {
@@ -852,6 +855,19 @@ static int emac_probe(struct platform_device *pdev) goto out_release_sram; }+ reset = devm_reset_control_get_optional_exclusive(&pdev->dev, NULL);+ if (IS_ERR(reset)) {+ dev_err(&pdev->dev, "unable to request reset\n");+ ret = -ENODEV;+ goto out_release_sram;+ }
Judging from your commit log, it's not really optional for the R40. The
way we usually deal with this is to have a structure associated with a
new compatible and have a flag tell if that compatible requires a reset
line or not.
The dt binding should also be amended to allow the reset property
got it
quoted
+ db->reset = reset;
+ ret = reset_control_deassert(db->reset);
+ if (ret) {
+ dev_err(&pdev->dev, "could not deassert EMAC reset\n");
+ goto out_release_sram;
+ }
+
The programming guidelines in the datasheet ask that the reset line must
be deasserted before the clock in enabled.