[PATCH] PCI: imx6: Select correct clock source for MX7D PCIe PHY
From: Marek Vasut <marex@denx.de>
Date: 2020-09-26 18:43:27
Subsystem:
pci driver for imx6, pci native host bridge and endpoint drivers, pci subsystem, the rest · Maintainers:
Richard Zhu, Lucas Stach, Lorenzo Pieralisi, Krzysztof Wilczyński, Manivannan Sadhasivam, Bjorn Helgaas, Linus Torvalds
The internal PCIe PHY clock source cannot lock the PLL, use the external pad one just like iMX8MQ does, which is very similar SoC in this area. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Richard Zhu <hongxing.zhu@nxp.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: linux-imx@nxp.com --- drivers/pci/controller/dwc/pci-imx6.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index 5fef2613b223..a70cf4181d57 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c@@ -636,7 +636,8 @@ static void imx6_pcie_init_phy(struct imx6_pcie *imx6_pcie) break; case IMX7D: regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, - IMX7D_GPR12_PCIE_PHY_REFCLK_SEL, 0); + IMX7D_GPR12_PCIE_PHY_REFCLK_SEL, + IMX7D_GPR12_PCIE_PHY_REFCLK_SEL); break; case IMX6SX: regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,
--
2.28.0
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