Re: [PATCH v2 4/5] clk: mediatek: Add configurable enable control to mtk_pll_data
From: Nicolas Boichat <hidden>
Date: 2020-08-11 07:28:43
Also in:
linux-clk, linux-mediatek, lkml
From: Nicolas Boichat <hidden>
Date: 2020-08-11 07:28:43
Also in:
linux-clk, linux-mediatek, lkml
On Tue, Aug 11, 2020 at 2:43 PM Weiyi Lu [off-list ref] wrote:
[...]quoted
quoted
+ writel(r, pll->en_addr); r = readl(pll->pwr_addr) | CON0_ISO_EN; writel(r, pll->pwr_addr);@@ -327,6 +327,10 @@ static struct clk *mtk_clk_register_pll(const struct mtk_pll_data *data, pll->tuner_addr = base + data->tuner_reg; if (data->tuner_en_reg) pll->tuner_en_addr = base + data->tuner_en_reg; + if (data->en_reg) + pll->en_addr = base + data->en_reg; + else + pll->en_addr = pll->base_addr + REG_CON0;Don't you need to set pll->data->pll_en_bit to CON0_BASE_EN here? (which probably means that you need to add a pll->en_bit field to struct mtk_clk_pll)Because all mtk_clk_pll data are static variables, en_bit would be 0 if NO value assigned.
Wow, you're right, but this is a little bit subtle. I wonder if it's worth adding a small comment? (either here or in struct mtk_pll_data) _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel