[PATCH 0/2] A couple of cleanups on top of for-next/e0pd

Hi Mark,

I've queued the E0PD patches for 5.6 (thanks!), but in reading them a
final time I noticed a couple of cleanups that I think we can make to
kaslr_requires_kpti(). I don't have a TX1 to test them on, but I think
the logic is sound.

Please take a look, as I'd like to queue these on top.

Thanks.

Will

Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: Marc Zyngier <maz@kernel.org>

--->8

Will Deacon (2):
  arm64: Simplify early check for broken TX1 when KASLR is enabled
  arm64: Use register field helper in kaslr_requires_kpti()

 arch/arm64/kernel/cpufeature.c | 21 +++++++--------------
 1 file changed, 7 insertions(+), 14 deletions(-)

-- 
2.25.0.rc1.283.g88dfdc4193-goog


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Now that the decision to use non-global mappings is stored in a variable,
the check to avoid enabling them for the terminally broken ThunderX1
platform can be simplified so that it is only keyed off the MIDR value.

Signed-off-by: Will Deacon <will@kernel.org>
---
 arch/arm64/kernel/cpufeature.c | 15 ++++-----------
 1 file changed, 4 insertions(+), 11 deletions(-)

diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index 4a031111ceb5..d5242b44dc5a 100644
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c

@@ -980,9 +980,7 @@ has_useable_cnp(const struct arm64_cpu_capabilities *entry, int scope)
  */
 bool kaslr_requires_kpti(void)
 {
-	bool tx1_bug;
 	u64 ftr;
-
 	if (!IS_ENABLED(CONFIG_RANDOMIZE_BASE))
 		return false;
 

@@ -1000,18 +998,13 @@ bool kaslr_requires_kpti(void)
 	 * Systems affected by Cavium erratum 24756 are incompatible
 	 * with KPTI.
 	 */
-	if (!IS_ENABLED(CONFIG_CAVIUM_ERRATUM_27456)) {
-		tx1_bug = false;
-	} else if (!static_branch_likely(&arm64_const_caps_ready)) {
+	if (IS_ENABLED(CONFIG_CAVIUM_ERRATUM_27456)) {
 		extern const struct midr_range cavium_erratum_27456_cpus[];
 
-		tx1_bug = is_midr_in_range_list(read_cpuid_id(),
-						cavium_erratum_27456_cpus);
-	} else {
-		tx1_bug = __cpus_have_const_cap(ARM64_WORKAROUND_CAVIUM_27456);
+		if (is_midr_in_range_list(read_cpuid_id(),
+					  cavium_erratum_27456_cpus))
+			return false;
 	}
-	if (tx1_bug)
-		return false;
 
 	return kaslr_offset() > 0;
 }

-- 
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Rather than open-code the extraction of the E0PD field from the MMFR2
register, we can use the cpuid_feature_extract_unsigned_field() helper
instead.

Signed-off-by: Will Deacon <will@kernel.org>
---
 arch/arm64/kernel/cpufeature.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index d5242b44dc5a..1ebeb5bc17d2 100644
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c

@@ -980,7 +980,6 @@ has_useable_cnp(const struct arm64_cpu_capabilities *entry, int scope)
  */
 bool kaslr_requires_kpti(void)
 {
-	u64 ftr;
 	if (!IS_ENABLED(CONFIG_RANDOMIZE_BASE))
 		return false;
 

@@ -989,8 +988,9 @@ bool kaslr_requires_kpti(void)
 	 * where available.
 	 */
 	if (IS_ENABLED(CONFIG_ARM64_E0PD)) {
-		ftr = read_sysreg_s(SYS_ID_AA64MMFR2_EL1);
-		if ((ftr >> ID_AA64MMFR2_E0PD_SHIFT) & 0xf)
+		u64 mmfr2 = read_sysreg_s(SYS_ID_AA64MMFR2_EL1);
+		if (cpuid_feature_extract_unsigned_field(mmfr2,
+						ID_AA64MMFR2_E0PD_SHIFT))
 			return false;
 	}
 

-- 
2.25.0.rc1.283.g88dfdc4193-goog


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On Wed, Jan 15, 2020 at 02:28:58PM +0000, Will Deacon wrote:

Will Deacon (2):
  arm64: Simplify early check for broken TX1 when KASLR is enabled
  arm64: Use register field helper in kaslr_requires_kpti()

The clean-ups look fine to me. With the latest patches we never call
kaslr_requires_kpti() after arm64_const_caps_ready has been set.

Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>

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On 15/01/2020 14:28, Will Deacon wrote:

Hi Mark,

I've queued the E0PD patches for 5.6 (thanks!), but in reading them a
final time I noticed a couple of cleanups that I think we can make to
kaslr_requires_kpti(). I don't have a TX1 to test them on, but I think
the logic is sound.

Please take a look, as I'd like to queue these on top.

Thanks.

Will

Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: Marc Zyngier <maz@kernel.org>

Looks good to me.

Acked-by: Suzuki K Poulose <suzuki.poulose@arm.com>

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On Wed, Jan 15, 2020 at 02:29:00PM +0000, Will Deacon wrote:

Rather than open-code the extraction of the E0PD field from the MMFR2
register, we can use the cpuid_feature_extract_unsigned_field() helper
instead.

This was suggested by Suzuki at some point but I ended up not
doing it as the helper function name is so long I couldn't work
out how to lay the code out in a satisfactory way at the time.

Reviewed-by: Mark Brown <broonie@kernel.org>