[PATCH 06/14] dt-bindings: clock: milbeaut: add Milbeaut clock description
From: sugaya.taichi@socionext.com (Sugaya Taichi)
Date: 2018-11-19 01:00:43
Also in:
linux-clk, linux-devicetree, linux-serial, lkml
Subsystem:
common clk framework, open firmware and flattened device tree bindings, the rest · Maintainers:
Michael Turquette, Stephen Boyd, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Linus Torvalds
Add DT bindings document for Milbeaut clock. Signed-off-by: Sugaya Taichi <sugaya.taichi@socionext.com> --- .../devicetree/bindings/clock/milbeaut-clock.txt | 93 ++++++++++++++++++++++ 1 file changed, 93 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/milbeaut-clock.txt
diff --git a/Documentation/devicetree/bindings/clock/milbeaut-clock.txt b/Documentation/devicetree/bindings/clock/milbeaut-clock.txt
new file mode 100644
index 0000000..5c093c8
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/milbeaut-clock.txt@@ -0,0 +1,93 @@ +Milbeaut M10V Clock Controller Binding +---------------------------------------- +Milbeaut clock controller is consists of few oscillators, PLL, multiplexer +and few divider modules + +This binding uses common clock bindings +[1] Documentation/devicetree/bindings/clock/clock-bindings.txt + +Required properties: +- compatible: shall be "socionext,milbeaut-m10v-clk-regs" +- reg: shall contain base address and length of clock registers +- #clock-cells: shall be 0 + +Example: + m10v-clk-tree@ { + compatible = "socionext,milbeaut-m10v-clk-regs"; + reg = <0x1d021000 0x4000>; + + clocks { + #address-cells = <0>; + #size-cells = <0>; + + uclk40xi: uclk40xi { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <40000000>; + }; + }; + } + +The clock consumer shall specify the desired clock-output of the clock +controller (as defined in [2]) by specifying output-id in its "clock" +phandle cell +[2] arch/arm/boot/dts/milbeaut-m10v-clk.h + +For example for UART1: + usio1: usio_uart at 1e700010 { + index = <0>; + compatible = "socionext,milbeaut-m10v-usio-uart"; + reg = <0x1e700010 0x10>; + interrupts = <0 141 0x4>, <0 149 0x4>; + interrupt-names = "rx", "tx"; + clocks = <&hclk>; + }; + + + + +Required properties: +- compatible: + "socionext,milbeaut-m10v-clk-mux" + -clock-cells: should be 0 + -clocks: should be two factor + "socionext,milbeaut-m10v-pll-fixed-factor" + -clock-cells: should be 0 + -clocks: should be one factor + -offset: offset + -clock-div: div number + -clock-mult: multiple number + "socionext,milbeaut-m10v-clk-div" + -clock-cells: should be 0 + -clocks: should be one factor + -offset: offset + -mask: mask bit + -ratios: div ratio + +Example + piclk_mux_0: spiclk_mux_0 { + compatible = "socionext,m10v-clk-div"; + #clock-cells = <0>; + clocks = <&pll10_div_1_2>; + offset = <bSPICLK>; + mask = <0x3>; + ratios = <4 0x5 2 0x4>; + }; + + pll10: pll10 { + compatible = "socionext,m10v-pll-fixed-factor"; + #clock-cells = <0>; + clocks = <&uclk40xi>; + offset = <10>; + clock-div = <5>; + clock-mult = <108>; + }; + + emmcclk: emmcclk { + compatible = "socionext,m10v-clk-div"; + #clock-cells = <0>; + clocks = <&pll11>; + offset = <bEMMCCLK>; + mask = <0x3>; + ratios = <15 0x7 10 0x6 9 0x5 8 0x4>; + };
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1.9.1