[PATCH] arm64/ptrace: add PTRACE_SYSEMU and PTRACE_SYSEMU_SINGLESTEP support

Add PTRACE_SYSEMU and PTRACE_SYSEMU_SINGLESTEP support on ARM64.
This copies the x86 semantics for invoking ptrace hooks, and have
been verified on ARM64 machine.

Signed-off-by: Haibo.Xu <redacted>
Signed-off-by: Bin.Lu <redacted>
---
 arch/arm64/include/asm/thread_info.h |  5 ++++-
 arch/arm64/include/uapi/asm/ptrace.h |  2 ++
 arch/arm64/kernel/ptrace.c           | 17 +++++++++++++++++
 3 files changed, 23 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/include/asm/thread_info.h b/arch/arm64/include/asm/thread_info.h
index 46c3b93..5060d2d 100644
--- a/arch/arm64/include/asm/thread_info.h
+++ b/arch/arm64/include/asm/thread_info.h

@@ -75,6 +75,7 @@ struct thread_info {
  *  TIF_SYSCALL_TRACE  - syscall trace active
  *  TIF_SYSCALL_TRACEPOINT - syscall tracepoint for ftrace
  *  TIF_SYSCALL_AUDIT  - syscall auditing
+ *  TIF_SYSCALL_EMU    - syscall emulation active
  *  TIF_SECOMP         - syscall secure computing
  *  TIF_SIGPENDING     - signal pending
  *  TIF_NEED_RESCHED   - rescheduling necessary

@@ -91,6 +92,7 @@ struct thread_info {
 #define TIF_SYSCALL_AUDIT      9
 #define TIF_SYSCALL_TRACEPOINT 10
 #define TIF_SECCOMP            11
+#define TIF_SYSCALL_EMU                12
 #define TIF_MEMDIE             18      /* is terminating due to OOM killer */
 #define TIF_FREEZE             19
 #define TIF_RESTORE_SIGMASK    20

@@ -106,6 +108,7 @@ struct thread_info {
 #define _TIF_SYSCALL_AUDIT     (1 << TIF_SYSCALL_AUDIT)
 #define _TIF_SYSCALL_TRACEPOINT        (1 << TIF_SYSCALL_TRACEPOINT)
 #define _TIF_SECCOMP           (1 << TIF_SECCOMP)
+#define _TIF_SYSCALL_EMU       (1 << TIF_SYSCALL_EMU)
 #define _TIF_UPROBE            (1 << TIF_UPROBE)
 #define _TIF_32BIT             (1 << TIF_32BIT)

@@ -115,7 +118,7 @@ struct thread_info {

 #define _TIF_SYSCALL_WORK      (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | \
                                 _TIF_SYSCALL_TRACEPOINT | _TIF_SECCOMP | \
-                                _TIF_NOHZ)
+                                _TIF_NOHZ | _TIF_SYSCALL_EMU)

 #endif /* __KERNEL__ */
 #endif /* __ASM_THREAD_INFO_H */

diff --git a/arch/arm64/include/uapi/asm/ptrace.h b/arch/arm64/include/uapi/asm/ptrace.h
index b5c3933..04ab06f 100644
--- a/arch/arm64/include/uapi/asm/ptrace.h
+++ b/arch/arm64/include/uapi/asm/ptrace.h

@@ -23,6 +23,8 @@

 #include <asm/hwcap.h>

+#define PTRACE_SYSEMU                  31
+#define PTRACE_SYSEMU_SINGLESTEP       32

 /*
  * PSR bits

diff --git a/arch/arm64/kernel/ptrace.c b/arch/arm64/kernel/ptrace.c
index fc35e06..ff3e322 100644
--- a/arch/arm64/kernel/ptrace.c
+++ b/arch/arm64/kernel/ptrace.c

@@ -165,6 +165,9 @@ void ptrace_disable(struct task_struct *child)
         * is likely to cause regressions on obscure architectures.
         */
        user_disable_single_step(child);
+#ifdef TIF_SYSCALL_EMU
+       clear_tsk_thread_flag(child, TIF_SYSCALL_EMU);
+#endif
 }

 #ifdef CONFIG_HAVE_HW_BREAKPOINT

@@ -1351,6 +1354,11 @@ asmlinkage int syscall_trace_enter(struct pt_regs *regs)
        if (test_thread_flag(TIF_SYSCALL_TRACE))
                tracehook_report_syscall(regs, PTRACE_SYSCALL_ENTER);

+       if (test_thread_flag(TIF_SYSCALL_EMU)) {
+               tracehook_report_syscall(regs, PTRACE_SYSCALL_ENTER);
+               return -1;
+       }
+
        /* Do the secure computing after ptrace; failures should be fast. */
        if (secure_computing(NULL) == -1)
                return -1;

@@ -1373,6 +1381,15 @@ asmlinkage void syscall_trace_exit(struct pt_regs *regs)

        if (test_thread_flag(TIF_SYSCALL_TRACE))
                tracehook_report_syscall(regs, PTRACE_SYSCALL_EXIT);
+
+       /*
+        * We only get here because of TIF_SINGLESTEP,
+        * for PTRACE_SYSEMU_SINGLESTEP, we already reported
+        * the syscall instruction in syscall_trace_enter().
+        */
+       if (test_thread_flag(TIF_SINGLESTEP) &&
+                       !test_thread_flag(TIF_SYSCALL_EMU))
+               tracehook_report_syscall_exit(regs, 1);
 }

 /*
--

2.7.4

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On Mon, Sep 03, 2018 at 02:23:17PM +0800, Haibo.Xu wrote:

Add PTRACE_SYSEMU and PTRACE_SYSEMU_SINGLESTEP support on ARM64.
This copies the x86 semantics for invoking ptrace hooks, and have
been verified on ARM64 machine.

Signed-off-by: Haibo.Xu <redacted>
Signed-off-by: Bin.Lu <redacted>
---
 arch/arm64/include/asm/thread_info.h |  5 ++++-
 arch/arm64/include/uapi/asm/ptrace.h |  2 ++
 arch/arm64/kernel/ptrace.c           | 17 +++++++++++++++++
 3 files changed, 23 insertions(+), 1 deletion(-)

What is PTRACE_SYSEMU and what is its semantics? Why isn't it done in the
core ptrace code?

This looks weird -- are TIF_SYSCALL_EMU and TIF_SYSCALL_TRACE mutually
exclusive, or is it harmless to report this twice? Why do we return early
and skip the seccomp checks?

Will

Am Montag, 3. September 2018, 18:31:03 CEST schrieb Will Deacon:

On Mon, Sep 03, 2018 at 02:23:17PM +0800, Haibo.Xu wrote:

quoted

Add PTRACE_SYSEMU and PTRACE_SYSEMU_SINGLESTEP support on ARM64.
This copies the x86 semantics for invoking ptrace hooks, and have
been verified on ARM64 machine.

Signed-off-by: Haibo.Xu <redacted>
Signed-off-by: Bin.Lu <redacted>
---
 arch/arm64/include/asm/thread_info.h |  5 ++++-
 arch/arm64/include/uapi/asm/ptrace.h |  2 ++
 arch/arm64/kernel/ptrace.c           | 17 +++++++++++++++++
 3 files changed, 23 insertions(+), 1 deletion(-)

What is PTRACE_SYSEMU and what is its semantics? Why isn't it done in the
core ptrace code?

It is an optimization added for UserModeLinux many years ago.
PTRACE_SYSEMU basically allows you to handle system calls in user space
without the kernel seeing them.
Before that UML had to render every system call into a no-op, e.h. getpid().
This was complicated and slow.

The ptrace() manpage has a section on PTRACE_SYSEMU, more documentation on the
semantics is not available.

And yes, I think this should also done in the core. Like many other ptrace() areas
this needs a cleanup. ;-)

I wonder what Haibo Xu want to do with PTRACE_SYSEMU on arm64.
Are you porting UML or gvisor to arm64?

Thanks,
//richard

Hi Richard,

On Mon, Sep 03, 2018 at 06:40:51PM +0200, Richard Weinberger wrote:

Am Montag, 3. September 2018, 18:31:03 CEST schrieb Will Deacon:

quoted

On Mon, Sep 03, 2018 at 02:23:17PM +0800, Haibo.Xu wrote:

quoted

Add PTRACE_SYSEMU and PTRACE_SYSEMU_SINGLESTEP support on ARM64.
This copies the x86 semantics for invoking ptrace hooks, and have
been verified on ARM64 machine.

Signed-off-by: Haibo.Xu <redacted>
Signed-off-by: Bin.Lu <redacted>
---
 arch/arm64/include/asm/thread_info.h |  5 ++++-
 arch/arm64/include/uapi/asm/ptrace.h |  2 ++
 arch/arm64/kernel/ptrace.c           | 17 +++++++++++++++++
 3 files changed, 23 insertions(+), 1 deletion(-)

What is PTRACE_SYSEMU and what is its semantics? Why isn't it done in the
core ptrace code?

It is an optimization added for UserModeLinux many years ago.
PTRACE_SYSEMU basically allows you to handle system calls in user space
without the kernel seeing them.
Before that UML had to render every system call into a no-op, e.h. getpid().
This was complicated and slow.

Ok, thanks for the insight!

The ptrace() manpage has a section on PTRACE_SYSEMU, more documentation on the
semantics is not available.

:( We already have tracehook, seccomp, tracepoint and audit fighting with
each other on syscall entry, so I'm really not keen to add another player to
the game unless we really have to.

Has anybody tried implementing this using tracehook?

And yes, I think this should also done in the core. Like many other ptrace() areas
this needs a cleanup. ;-)

I wonder what Haibo Xu want to do with PTRACE_SYSEMU on arm64.
Are you porting UML or gvisor to arm64?

That's a good question. Haibo?

Will

Hi Will,

On Mon, Sep 03, 2018 at 06:40:51PM +0200, Richard Weinberger wrote:

quoted

Am Montag, 3. September 2018, 18:31:03 CEST schrieb Will Deacon:

quoted

On Mon, Sep 03, 2018 at 02:23:17PM +0800, Haibo.Xu wrote:

quoted

Add PTRACE_SYSEMU and PTRACE_SYSEMU_SINGLESTEP support on ARM64.
This copies the x86 semantics for invoking ptrace hooks, and have
been verified on ARM64 machine.

Signed-off-by: Haibo.Xu <redacted>
Signed-off-by: Bin.Lu <redacted>
---
 arch/arm64/include/asm/thread_info.h |  5 ++++-
arch/arm64/include/uapi/asm/ptrace.h |  2 ++
 arch/arm64/kernel/ptrace.c           | 17 +++++++++++++++++
 3 files changed, 23 insertions(+), 1 deletion(-)

What is PTRACE_SYSEMU and what is its semantics? Why isn't it done
in the core ptrace code?

It is an optimization added for UserModeLinux many years ago.
PTRACE_SYSEMU basically allows you to handle system calls in user
space without the kernel seeing them.
Before that UML had to render every system call into a no-op, e.h. getpid().
This was complicated and slow.

Ok, thanks for the insight!

Thanks for Richard's comments!

quoted

The ptrace() manpage has a section on PTRACE_SYSEMU, more
documentation on the semantics is not available.

:( We already have tracehook, seccomp, tracepoint and audit fighting with each other on syscall entry, so I'm really not keen to add another player to the game unless we really have to.

Has anybody tried implementing this using tracehook?

Currently, it seems nobody has tried it.

quoted

And yes, I think this should also done in the core. Like many other
ptrace() areas this needs a cleanup. ;-)

Hi Richard,

What do you mean by done it in the core? moving macro definition to include/uapi/linux/ptrace.h?
The patch is strictly follow x86's sematic on PTRACE_SYSEMU/SINGLESTEP support.

quoted

I wonder what Haibo Xu want to do with PTRACE_SYSEMU on arm64.
Are you porting UML or gvisor to arm64?

That's a good question. Haibo?

The story is we are working on a container runtime(Google Gvisor) support on ARM64 platform,
and the Gvisor depend on Linux kernel PTRACE_SYSEMU/SINGLESTEP support.

Haibo
-----????-----
???: Will Deacon [off-list ref]
????: 2018?9?4? 0:57
???: Richard Weinberger [off-list ref]
??: Haibo Xu (Arm Technology China) [off-list ref]; Catalin Marinas [off-list ref]; linux-arm-kernel at lists.infradead.org; linux-kernel at vger.kernel.org; nd [off-list ref]; jdike at addtoit.com
??: Re: [PATCH] arm64/ptrace: add PTRACE_SYSEMU and PTRACE_SYSEMU_SINGLESTEP support

Hi Richard,

On Mon, Sep 03, 2018 at 06:40:51PM +0200, Richard Weinberger wrote:

Am Montag, 3. September 2018, 18:31:03 CEST schrieb Will Deacon:

quoted

On Mon, Sep 03, 2018 at 02:23:17PM +0800, Haibo.Xu wrote:

quoted

Add PTRACE_SYSEMU and PTRACE_SYSEMU_SINGLESTEP support on ARM64.
This copies the x86 semantics for invoking ptrace hooks, and have
been verified on ARM64 machine.

Signed-off-by: Haibo.Xu <redacted>
Signed-off-by: Bin.Lu <redacted>
---
 arch/arm64/include/asm/thread_info.h |  5 ++++-
arch/arm64/include/uapi/asm/ptrace.h |  2 ++
 arch/arm64/kernel/ptrace.c           | 17 +++++++++++++++++
 3 files changed, 23 insertions(+), 1 deletion(-)

What is PTRACE_SYSEMU and what is its semantics? Why isn't it done
in the core ptrace code?

It is an optimization added for UserModeLinux many years ago.
PTRACE_SYSEMU basically allows you to handle system calls in user
space without the kernel seeing them.
Before that UML had to render every system call into a no-op, e.h. getpid().
This was complicated and slow.

Ok, thanks for the insight!

The ptrace() manpage has a section on PTRACE_SYSEMU, more
documentation on the semantics is not available.

:( We already have tracehook, seccomp, tracepoint and audit fighting with each other on syscall entry, so I'm really not keen to add another player to the game unless we really have to.

Has anybody tried implementing this using tracehook?

And yes, I think this should also done in the core. Like many other
ptrace() areas this needs a cleanup. ;-)

I wonder what Haibo Xu want to do with PTRACE_SYSEMU on arm64.
Are you porting UML or gvisor to arm64?

That's a good question. Haibo?

Will
IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.

Am Dienstag, 4. September 2018, 04:11:07 CEST schrieb Haibo Xu (Arm Technology China):

Hi Richard,

What do you mean by done it in the core? moving macro definition to include/uapi/linux/ptrace.h?
The patch is strictly follow x86's sematic on PTRACE_SYSEMU/SINGLESTEP support.

Well, the feature itself is not really architecture specific.
Just because x86 does it in arch/x86, it does not mean that this is the best way.
I guess this is also what Will tried to say.
If we can, we should implement PTRACE_SYSEMU in the core ptrace code and not
per architecture.

quoted

quoted

I wonder what Haibo Xu want to do with PTRACE_SYSEMU on arm64.
Are you porting UML or gvisor to arm64?

That's a good question. Haibo?

The story is we are working on a container runtime(Google Gvisor) support on ARM64 platform,
and the Gvisor depend on Linux kernel PTRACE_SYSEMU/SINGLESTEP support.

Gvisor also supports a kvm backend which should be *much* faster than PTRACE_SYSEMU.
Otherwise gvisor suffers from the same performance drawbacks as UML does.
Pagefaults via SIGSEGV/mmap, syscall gate via ptrace().

Did you check, is PTRACE_SYSEMU really the way to go for gvisor?
Last time I checked the KVM backend looked promising but still WIP, though.

I also wonder whether PTRACE_SYSEMU is really the only missing bit to support
gvisor on arm64. Did you check how to work around VIPT/VIVT caching issues?
UML (and gvisor in this context) have lots of implicit x86 dependencies.

Thanks,
//richard

On Wed, Sep 05, 2018 at 03:45:51AM +0200, Richard Weinberger wrote:

Am Dienstag, 4. September 2018, 04:11:07 CEST schrieb Haibo Xu (Arm Technology China):

quoted

Hi Richard,

What do you mean by done it in the core? moving macro definition to include/uapi/linux/ptrace.h?
The patch is strictly follow x86's sematic on PTRACE_SYSEMU/SINGLESTEP support.

Well, the feature itself is not really architecture specific.
Just because x86 does it in arch/x86, it does not mean that this is the best way.
I guess this is also what Will tried to say.
If we can, we should implement PTRACE_SYSEMU in the core ptrace code and not per architecture.

Yes, the feature is common on x86/ARM64, and there are many duplicated codes
on both architecture specific ptrace codes. But to unify these codes may take more time,
we need to re-evaluate the workload.

quoted

quoted

quoted

I wonder what Haibo Xu want to do with PTRACE_SYSEMU on arm64.
Are you porting UML or gvisor to arm64?

That's a good question. Haibo?

The story is we are working on a container runtime(Google Gvisor)
support on ARM64 platform, and the Gvisor depend on Linux kernel PTRACE_SYSEMU/SINGLESTEP support.

Gvisor also supports a kvm backend which should be *much* faster than PTRACE_SYSEMU.
Otherwise gvisor suffers from the same performance drawbacks as UML does.
Pagefaults via SIGSEGV/mmap, syscall gate via ptrace().

Did you check, is PTRACE_SYSEMU really the way to go for gvisor?
Last time I checked the KVM backend looked promising but still WIP, though.

Gvisor do support two platforms, ptrace and kvm. To support ptrace platform on ARM64 is our first step.

From the long run, KVM would be a better choice, and we will work on it after ptrace platform get worked.

I also wonder whether PTRACE_SYSEMU is really the only missing bit to support gvisor on arm64. Did you check how to work around VIPT/VIVT caching issues?
UML (and gvisor in this context) have lots of implicit x86 dependencies.

As far as we know,  PTRACE_SYSEMU is the only missing bit that needed in Linux kernel to support Gvisor on ARM64.
For the VIPT/VIVT caching issues, we haven't look into it.  Could you help share more info about the issue?

Thanks,

Haibo

-----????-----
???: Richard Weinberger [off-list ref]
????: 2018?9?5? 3:45
???: Haibo Xu (Arm Technology China) [off-list ref]
??: Will Deacon [off-list ref]; Catalin Marinas [off-list ref]; linux-arm-kernel at lists.infradead.org; linux-kernel at vger.kernel.org; nd [off-list ref]; jdike at addtoit.com
??: Re: ??: [PATCH] arm64/ptrace: add PTRACE_SYSEMU and PTRACE_SYSEMU_SINGLESTEP support

Am Dienstag, 4. September 2018, 04:11:07 CEST schrieb Haibo Xu (Arm Technology China):

Hi Richard,

What do you mean by done it in the core? moving macro definition to include/uapi/linux/ptrace.h?
The patch is strictly follow x86's sematic on PTRACE_SYSEMU/SINGLESTEP support.

Well, the feature itself is not really architecture specific.
Just because x86 does it in arch/x86, it does not mean that this is the best way.
I guess this is also what Will tried to say.
If we can, we should implement PTRACE_SYSEMU in the core ptrace code and not per architecture.

quoted

quoted

I wonder what Haibo Xu want to do with PTRACE_SYSEMU on arm64.
Are you porting UML or gvisor to arm64?

That's a good question. Haibo?

The story is we are working on a container runtime(Google Gvisor)
support on ARM64 platform, and the Gvisor depend on Linux kernel PTRACE_SYSEMU/SINGLESTEP support.

Gvisor also supports a kvm backend which should be *much* faster than PTRACE_SYSEMU.
Otherwise gvisor suffers from the same performance drawbacks as UML does.
Pagefaults via SIGSEGV/mmap, syscall gate via ptrace().

Did you check, is PTRACE_SYSEMU really the way to go for gvisor?
Last time I checked the KVM backend looked promising but still WIP, though.

I also wonder whether PTRACE_SYSEMU is really the only missing bit to support gvisor on arm64. Did you check how to work around VIPT/VIVT caching issues?
UML (and gvisor in this context) have lots of implicit x86 dependencies.

Thanks,
//richard


IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.

On Wed, Sep 05, 2018 at 03:45:51AM +0200, Richard Weinberger wrote:

Am Dienstag, 4. September 2018, 04:11:07 CEST schrieb Haibo Xu (Arm Technology China):

quoted

Hi Richard,

What do you mean by done it in the core? moving macro definition to include/uapi/linux/ptrace.h?
The patch is strictly follow x86's sematic on PTRACE_SYSEMU/SINGLESTEP support.

Well, the feature itself is not really architecture specific.
Just because x86 does it in arch/x86, it does not mean that this is the best way.
I guess this is also what Will tried to say.
If we can, we should implement PTRACE_SYSEMU in the core ptrace code and not per architecture.

After re-evaluating the workload to unify the PTRACE_SYSEMU in the core ptrace code on both ARM and x86 architecture,
We think we are not able to work on it recently(we only have 1.5 person work on the Gvisor project).

quoted

quoted

quoted

I wonder what Haibo Xu want to do with PTRACE_SYSEMU on arm64.
Are you porting UML or gvisor to arm64?

That's a good question. Haibo?

The story is we are working on a container runtime(Google Gvisor)
support on ARM64 platform, and the Gvisor depend on Linux kernel PTRACE_SYSEMU/SINGLESTEP support.

Gvisor also supports a kvm backend which should be *much* faster than PTRACE_SYSEMU.
Otherwise gvisor suffers from the same performance drawbacks as UML does.
Pagefaults via SIGSEGV/mmap, syscall gate via ptrace().

Did you check, is PTRACE_SYSEMU really the way to go for gvisor?
Last time I checked the KVM backend looked promising but still WIP, though.

Gvisor do support two platforms, ptrace and kvm. To support ptrace platform on ARM64 is our first step.

From the long run, KVM would be a better choice, and we will work on it after ptrace platform get worked.

Currently,  our initial patches for Gvisor ARM64 support are ready for the small "hello-world" container
(please refer to the attachment for the test logs),  and we are in the process of upstreaming the code.
Could you help merge this patch to the Linux kernel for the time being?  We can reschedule the resource
to unify the overall Ptrace codes in the kernel late.

I also wonder whether PTRACE_SYSEMU is really the only missing bit to support gvisor on arm64. Did you check how to work around VIPT/VIVT caching issues?
UML (and gvisor in this context) have lots of implicit x86 dependencies.

As far as we know,  PTRACE_SYSEMU is the only missing bit that needed in Linux kernel to support Gvisor ptrace platform on ARM64.

Thanks,

Haibo

-----????-----
???: Richard Weinberger [off-list ref]
????: 2018?9?5? 3:45
???: Haibo Xu (Arm Technology China) [off-list ref]
??: Will Deacon [off-list ref]; Catalin Marinas [off-list ref]; linux-arm-kernel at lists.infradead.org; linux-kernel at vger.kernel.org; nd [off-list ref]; jdike at addtoit.com
??: Re: ??: [PATCH] arm64/ptrace: add PTRACE_SYSEMU and PTRACE_SYSEMU_SINGLESTEP support

Am Dienstag, 4. September 2018, 04:11:07 CEST schrieb Haibo Xu (Arm Technology China):

Hi Richard,

What do you mean by done it in the core? moving macro definition to include/uapi/linux/ptrace.h?
The patch is strictly follow x86's sematic on PTRACE_SYSEMU/SINGLESTEP support.

Well, the feature itself is not really architecture specific.
Just because x86 does it in arch/x86, it does not mean that this is the best way.
I guess this is also what Will tried to say.
If we can, we should implement PTRACE_SYSEMU in the core ptrace code and not per architecture.

quoted

quoted

I wonder what Haibo Xu want to do with PTRACE_SYSEMU on arm64.
Are you porting UML or gvisor to arm64?

That's a good question. Haibo?

The story is we are working on a container runtime(Google Gvisor)
support on ARM64 platform, and the Gvisor depend on Linux kernel PTRACE_SYSEMU/SINGLESTEP support.

Gvisor also supports a kvm backend which should be *much* faster than PTRACE_SYSEMU.
Otherwise gvisor suffers from the same performance drawbacks as UML does.
Pagefaults via SIGSEGV/mmap, syscall gate via ptrace().

Did you check, is PTRACE_SYSEMU really the way to go for gvisor?
Last time I checked the KVM backend looked promising but still WIP, though.

I also wonder whether PTRACE_SYSEMU is really the only missing bit to support gvisor on arm64. Did you check how to work around VIPT/VIVT caching issues?
UML (and gvisor in this context) have lots of implicit x86 dependencies.

Thanks,
//richard


IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.
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