On 4 September 2017 at 19:15, Nicolas Pitre [off-list ref] wrote:

On Sun, 3 Sep 2017, Ard Biesheuvel wrote:

quoted

To prepare for adding support for KASLR, which relocates all absolute
symbol references at runtime after the caches have been enabled,
update the MMU switch code to avoid using absolute symbol references
where possible. This ensures these quantities are invariant under
runtime relocation.

Cc: Russell King <linux@armlinux.org.uk>
Signed-off-by: Ard Biesheuvel <redacted>
---
 arch/arm/kernel/head-common.S | 39 ++++++++------------
 1 file changed, 15 insertions(+), 24 deletions(-)

diff --git a/arch/arm/kernel/head-common.S b/arch/arm/kernel/head-common.S
index 06035488130c..b74477507a12 100644
--- a/arch/arm/kernel/head-common.S
+++ b/arch/arm/kernel/head-common.S

@@ -79,9 +79,10 @@ ENDPROC(__vet_atags)
  */
      __INIT
 __mmap_switched:
-     adr     r3, __mmap_switched_data
-
-     ldmia   r3!, {r4, r5, r6, r7}
+     adr_l   r4, __data_loc
+     adr_l   r5, _sdata
+     adr_l   r6, __bss_start
+     adr_l   r7, _end
      cmp     r4, r5                          @ Copy data segment if needed
 1:   cmpne   r5, r6
      ldrne   fp, [r4], #4

@@ -93,9 +94,17 @@ __mmap_switched:
      strcc   fp, [r6],#4
      bcc     1b

- ARM(        ldmia   r3, {r4, r5, r6, r7, sp})
- THUMB(      ldmia   r3, {r4, r5, r6, r7}    )
- THUMB(      ldr     sp, [r3, #16]           )
+     adr_l   r3, init_thread_union + THREAD_START_SP
+     mov     sp, r3
+     adr_l   r4, processor_id
+     adr_l   r5, __machine_arch_type
+     adr_l   r6, __atags_pointer
+#ifdef CONFIG_CPU_CP15
+     adr_l   r7, cr_alignment
+#else
+     mov     r7, #0
+#endif

The code that follows is testing for a non-zero r7 value to store r0 so
you could make that code conditional rather than loading 0 here.

OK, I will look into that.