[patch v9 0/4] JTAG driver introduction
From: Oleksandr Shamray <hidden>
Date: 2017-09-28 08:53:23
Also in:
linux-api, linux-devicetree, linux-serial, linux-spi, lkml, openbmc
-----Original Message----- From: geert.uytterhoeven at gmail.com [mailto:geert.uytterhoeven at gmail.com] On Behalf Of Geert Uytterhoeven Sent: Thursday, September 28, 2017 11:33 AM To: Oleksandr Shamray <redacted> Cc: Greg KH <gregkh@linuxfoundation.org>; Arnd Bergmann [off-list ref]; linux-kernel at vger.kernel.org; linux-arm- kernel at lists.infradead.org; devicetree at vger.kernel.org; openbmc at lists.ozlabs.org; Joel Stanley [off-list ref]; Jiri Pirko [off-list ref]; Tobias Klauser [off-list ref]; linux- serial at vger.kernel.org; mec at shout.net; Vadim Pasternak [off-list ref]; system-sw-low-level <system-sw-low- level at mellanox.com>; Rob Herring [off-list ref]; openocd-devel- owner at lists.sourceforge.net; linux-api at vger.kernel.org; David S. Miller [off-list ref]; Mauro Carvalho Chehab [off-list ref]; linux-spi [off-list ref]; Mark Brown [off-list ref] Subject: Re: [patch v9 0/4] JTAG driver introduction Hi Oleksandr, [My attention was drawn by https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flwn.net %2FArticles%2F734440%2F&data=02%7C01%7Coleksandrs%40mellanox.com%7 C97b8ba88686a42daaace08d5064b92eb%7Ca652971c7d2e4d9ba6a4d149256f 461b%7C0%7C0%7C636421844026854216&sdata=TeHD4a3%2FBN6a5XG3Jizf5 pmsyJHJjzkEzkpnqsXC6S0%3D&reserved=0] [CC linux-spi, which was never included, while linux-serial was] On Thu, Sep 21, 2017 at 11:25 AM, Oleksandr Shamray [off-list ref] wrote:quoted
When a need raise up to use JTAG interface for system's devices programming or CPU debugging, usually the user layer application implements jtag protocol by bit-bang or using a proprietary connection to vendor hardware. This method can be slow and not generic.
[..]
quoted
Initial version provides the system calls set for: - SIR (Scan Instruction Register, IEEE 1149.1 Data Register scan); - SDR (Scan Data Register, IEEE 1149.1 Instruction Register scan); - RUNTEST (Forces the IEEE 1149.1 bus to a run state for a specified number of clocks. SoC which are not equipped with JTAG master interface, can be built on top of JTAG core driver infrastructure, by applying bit-banging of TDI, TDO, TCK and TMS pins within the hardware specific driver.Or by using an SPI master?
I think it depends on how flexible the SPI interface is. If you can set it to transfer from 1 to n bits at a time, and you control the TMS line in software, you should be able to use it. If the SPI interface can only transfer a multiple of 8 bits at a time, then in general it would not be suitable for JTAG.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-
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In personal conversations with technical people, I call myself a hacker. But
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