[RFC PATCH v2 0/2] nb8800 suspend/resume support

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2 messages, 2 authors, 2017-08-02 · open the first message on its own page

[RFC PATCH v2 0/2] nb8800 suspend/resume support

From: Måns Rullgård <hidden>
Date: 2017-08-02 15:56:57

Mason [off-list ref] writes:
On 02/08/2017 17:36, M?ns Rullg?rd wrote:
quoted
Mason wrote:
quoted
Looking at the tango-specific integration, I note this nugget:

1.5.4 Stopping & Starting the DMA

This feature has been added to allow the software to stop and start
the DMA without any issues.

Procedure:
1- STOP:
2- Stop RX core;
3- Set OWN bit of all descriptor of the chain to 1;
4- Stop DMA by writing dma_stop bit to 1 in  RX_DMA_Stop register
5- Wait around 100 clock cycles.

The pending packets are held until the system will re-start.

RE-START:
1- Clear dma_stop bit (note that if at the time of stopping the DMA,
the next packet in the FIFO was an UDP packet, when clearing dma_stop,
this packet will directly start being written in the DRAM since UDP
packets are not controlled by the descriptor mechanism);
2- Program a new chain of descriptor;
3- Re-enable DMA (rx_ctrl register)

rx_dma_stop:
Software control to stop the Rx DMA.
A write to this bit with "1" will gracefully stop the Rx DMA by after
transferring the current packet. If more packets are pending they will
be held until the software clears this bit.

Hmmm, what do you think? This looks promising...
This is only available in the more recent Sigma versions.  Although it
is nicer, I didn't think it was worth the trouble to support both
methods since the older method should work on all chips.
Well, from my perspective, the older method does not work on newer
chips :-)
It does work on tango4.

What does the tango5 do if you flood it with packets faster than the
kernel can keep up with?  That would make it hit the end of the rx
chain, which is apparently what makes it miserable with the current dma
stop code.

-- 
M?ns Rullg?rd

[RFC PATCH v2 0/2] nb8800 suspend/resume support

From: Mason <hidden>
Date: 2017-08-02 16:07:52

On 02/08/2017 17:56, M?ns Rullg?rd wrote:
Mason writes:
quoted
From my perspective, the older method does not work on newer chips :-)
It does work on tango4.
Agreed.
What does the tango5 do if you flood it with packets faster than the
kernel can keep up with?  That would make it hit the end of the rx
chain, which is apparently what makes it miserable with the current dma
stop code.
The simplest way to test this would be sending tiny packets
as fast as possible, right? So ping -f on a GigE link should
fit the bill?

Regards.
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