[PATCH 0/5] ARM: sunxi: Enable dwmac-sun8i on more boards

STALE3401d

Revision v1 of 2 in this series.

9 messages, 3 authors, 2017-06-06 · open the first message on its own page

[PATCH 0/5] ARM: sunxi: Enable dwmac-sun8i on more boards

From: Corentin Labbe <clabbe.montjoie@gmail.com>
Date: 2017-06-05 19:23:42

Hello

This serie enable dwmac-sun8i on more boards.
The first 3 patch enable dwmac-sun8i on some h3/h5 boards.
The last 2 add dwmac-sun8i on a83t.

Corentin Labbe (5):
  ARM: sun8i: orangepi-plus: Enable dwmac-sun8i
  ARM: sun8i: bananapi-m2-plus: Enable dwmac-sun8i
  ARM: sun50i: orangepi-pc2: Enable dwmac-sun8i
  ARM: sun8i: a83t: Add dt node for the syscon control module
  ARM: sun8i: a83t: add dwmac-sun8i ethernet driver

 arch/arm/boot/dts/sun8i-a83t.dtsi                  | 34 ++++++++++++++++++++++
 arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts    | 29 ++++++++++++++++++
 arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts       | 32 ++++++++++++++++++++
 .../boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts  | 27 +++++++++++++++++
 4 files changed, 122 insertions(+)

-- 
2.13.0

[PATCH 2/5] ARM: sun8i: bananapi-m2-plus: Enable dwmac-sun8i

From: Corentin Labbe <clabbe.montjoie@gmail.com>
Date: 2017-06-05 19:23:45

The dwmac-sun8i hardware is present on the Banana Pi M2+
It uses an external PHY rtl8211e via RGMII.

This patch create the needed regulator, emac and phy nodes.

Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
---
 arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 29 +++++++++++++++++++++++++
 1 file changed, 29 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
index 883072b611fa..d756ff825116 100644
--- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts

@@ -52,6 +52,7 @@
 	compatible = "sinovoip,bpi-m2-plus", "allwinner,sun8i-h3";
 
 	aliases {
+		ethernet0 = &emac;
 		serial0 = &uart0;
 		serial1 = &uart1;
 	};

@@ -84,6 +85,16 @@
 		};
 	};
 
+	reg_gmac_3v3: gmac-3v3 {
+		      compatible = "regulator-fixed";
+		      regulator-name = "gmac-3v3";
+		      regulator-min-microvolt = <3300000>;
+		      regulator-max-microvolt = <3300000>;
+		      startup-delay-us = <100000>;
+		      enable-active-high;
+		      gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
+	};
+
 	wifi_pwrseq: wifi_pwrseq {
 		compatible = "mmc-pwrseq-simple";
 		pinctrl-names = "default";

@@ -104,12 +115,30 @@
 	status = "okay";
 };
 
+&emac {
+	pinctrl-names = "default";
+	pinctrl-0 = <&emac_rgmii_pins>;
+	phy-supply = <&reg_gmac_3v3>;
+	phy-handle = <&ext_rgmii_phy>;
+	phy-mode = "rgmii";
+
+	allwinner,leds-active-low;
+	status = "okay";
+};
+
 &ir {
 	pinctrl-names = "default";
 	pinctrl-0 = <&ir_pins_a>;
 	status = "okay";
 };
 
+&mdio {
+	ext_rgmii_phy: ethernet-phy at 1 {
+		compatible = "ethernet-phy-ieee802.3-c22";
+		reg = <0>;
+	};
+};
+
 &mmc0 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;

-- 
2.13.0

[PATCH 4/5] ARM: sun8i: a83t: Add dt node for the syscon control module

From: Corentin Labbe <clabbe.montjoie@gmail.com>
Date: 2017-06-05 19:23:47

This patch add the dt node for the syscon register present on the
Allwinner A83T

Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
---
 arch/arm/boot/dts/sun8i-a83t.dtsi | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index 1dc4cfe81534..ae559dc42caa 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi

@@ -163,6 +163,12 @@
 		#size-cells = <1>;
 		ranges;
 
+		syscon: syscon at 1c00000 {
+			compatible = "syscon",
+				"allwinner,sun8i-a83t-system-controller";
+			reg = <0x01c00000 0x1000>;
+		};
+
 		dma: dma-controller at 1c02000 {
 			compatible = "allwinner,sun8i-a83t-dma";
 			reg = <0x01c02000 0x1000>;

-- 
2.13.0

[PATCH 5/5] ARM: sun8i: a83t: add dwmac-sun8i ethernet driver

From: Corentin Labbe <clabbe.montjoie@gmail.com>
Date: 2017-06-05 19:23:55

The dwmac-sun8i is an ethernet MAC hardware that support 10/100/1000 speed.
This patch enable the dwmac-sun8i on the Allwinner a83t SoC Device-tree.

Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
---
 arch/arm/boot/dts/sun8i-a83t.dtsi | 28 ++++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index ae559dc42caa..304a966c8048 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi

@@ -200,6 +200,14 @@
 			#interrupt-cells = <3>;
 			#gpio-cells = <3>;
 
+			emac_rgmii_pins: emac0-pins {
+				pins = "PD2", "PD3", "PD4", "PD5", "PD6", "PD7",
+				       "PD11", "PD12", "PD13", "PD14", "PD18",
+				       "PD19", "PD21", "PD22", "PD23";
+				function = "gmac";
+				drive-strength = <40>;
+			};
+
 			mmc0_pins: mmc0-pins {
 				pins = "PF0", "PF1", "PF2",
 				       "PF3", "PF4", "PF5";

@@ -266,6 +274,26 @@
 			status = "disabled";
 		};
 
+		emac: ethernet at 1c30000 {
+			compatible = "allwinner,sun8i-a83t-emac";
+			syscon = <&syscon>;
+			reg = <0x01c30000 0x104>;
+			interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "macirq";
+			resets = <&ccu 13>;
+			reset-names = "stmmaceth";
+			clocks = <&ccu 27>;
+			clock-names = "stmmaceth";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+
+			mdio: mdio {
+				#address-cells = <1>;
+				#size-cells = <0>;
+			};
+		};
+
 		gic: interrupt-controller at 1c81000 {
 			compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
 			reg = <0x01c81000 0x1000>,

-- 
2.13.0

[PATCH 3/5] ARM: sun50i: orangepi-pc2: Enable dwmac-sun8i

From: Corentin Labbe <clabbe.montjoie@gmail.com>
Date: 2017-06-05 19:25:25

The dwmac-sun8i hardware is present on the Orange PI PC2.
It uses an external PHY rtl8211e via RGMII.

This patch create the needed regulator, emac and phy nodes.
Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
---
 .../boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts  | 27 ++++++++++++++++++++++
 1 file changed, 27 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
index dfecc17dcc92..a8296feee884 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts

@@ -59,6 +59,7 @@
 	};
 
 	aliases {
+		ethernet0 = &emac;
 		serial0 = &uart0;
 	};

@@ -91,6 +92,16 @@
 		};
 	};
 
+	reg_gmac_3v3: gmac-3v3 {
+		compatible = "regulator-fixed";
+		regulator-name = "gmac-3v3";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		startup-delay-us = <100000>;
+		enable-active-high;
+		gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
+	};
+
 	reg_usb0_vbus: usb0-vbus {
 		compatible = "regulator-fixed";
 		regulator-name = "usb0-vbus";

@@ -126,12 +137,28 @@
 	status = "okay";
 };
 
+&emac {
+	pinctrl-names = "default";
+	pinctrl-0 = <&emac_rgmii_pins>;
+	phy-supply = <&reg_gmac_3v3>;
+	phy-handle = <&ext_rgmii_phy>;
+	phy-mode = "rgmii";
+	status = "okay";
+};
+
 &ir {
 	pinctrl-names = "default";
 	pinctrl-0 = <&ir_pins_a>;
 	status = "okay";
 };
 
+&mdio {
+	ext_rgmii_phy: ethernet-phy at 1 {
+		compatible = "ethernet-phy-ieee802.3-c22";
+		reg = <1>;
+	};
+};
+
 &mmc0 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;

-- 
2.13.0

[PATCH 1/5] ARM: sun8i: orangepi-plus: Enable dwmac-sun8i

From: Corentin Labbe <clabbe.montjoie@gmail.com>
Date: 2017-06-05 19:25:46

The dwmac-sun8i hardware is present on the Orange PI plus.
It uses an external PHY rtl8211e via RGMII.

This patch create the needed regulator, emac and phy nodes.

Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
---
 arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 32 ++++++++++++++++++++++++++++
 1 file changed, 32 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
index 8c40ab7bfa72..331ed683ac62 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts

@@ -47,6 +47,20 @@
 	model = "Xunlong Orange Pi Plus / Plus 2";
 	compatible = "xunlong,orangepi-plus", "allwinner,sun8i-h3";
 
+	aliases {
+		ethernet0 = &emac;
+	};
+
+	reg_gmac_3v3: gmac-3v3 {
+		compatible = "regulator-fixed";
+		regulator-name = "gmac-3v3";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		startup-delay-us = <100000>;
+		enable-active-high;
+		gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
+	};
+
 	reg_usb3_vbus: usb3-vbus {
 		compatible = "regulator-fixed";
 		pinctrl-names = "default";

@@ -64,6 +78,24 @@
 	status = "okay";
 };
 
+&emac {
+	pinctrl-names = "default";
+	pinctrl-0 = <&emac_rgmii_pins>;
+	phy-supply = <&reg_gmac_3v3>;
+	phy-handle = <&ext_rgmii_phy>;
+	phy-mode = "rgmii";
+
+	allwinner,leds-active-low;
+	status = "okay";
+};
+
+&mdio {
+	ext_rgmii_phy: ethernet-phy at 1 {
+		compatible = "ethernet-phy-ieee802.3-c22";
+		reg = <0>;
+	};
+};
+
 &mmc2 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&mmc2_8bit_pins>;

-- 
2.13.0

Re: [PATCH 4/5] ARM: sun8i: a83t: Add dt node for the syscon control module

From: Chen-Yu Tsai <hidden>
Date: 2017-06-06 02:57:56

On Tue, Jun 6, 2017 at 3:21 AM, Corentin Labbe
[off-list ref] wrote:

quoted hunk

This patch add the dt node for the syscon register present on the
Allwinner A83T

Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
---
 arch/arm/boot/dts/sun8i-a83t.dtsi | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index 1dc4cfe81534..ae559dc42caa 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi

@@ -163,6 +163,12 @@
                #size-cells = <1>;
                ranges;

+               syscon: syscon at 1c00000 {
+                       compatible = "syscon",
+                               "allwinner,sun8i-a83t-system-controller";

syscon is the most generic compatible string here.
It should be the last one in the list.

Otherwise,

Reviewed-by: Chen-Yu Tsai <redacted>

+                       reg = <0x01c00000 0x1000>;
+               };
+
                dma: dma-controller at 1c02000 {
                        compatible = "allwinner,sun8i-a83t-dma";
                        reg = <0x01c02000 0x1000>;
--
2.13.0

Re: [PATCH 5/5] ARM: sun8i: a83t: add dwmac-sun8i ethernet driver

From: Chen-Yu Tsai <hidden>
Date: 2017-06-06 13:54:38

On Tue, Jun 6, 2017 at 3:21 AM, Corentin Labbe
[off-list ref] wrote:

quoted hunk

The dwmac-sun8i is an ethernet MAC hardware that support 10/100/1000 speed.
This patch enable the dwmac-sun8i on the Allwinner a83t SoC Device-tree.

Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
---
 arch/arm/boot/dts/sun8i-a83t.dtsi | 28 ++++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index ae559dc42caa..304a966c8048 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi

@@ -200,6 +200,14 @@
                        #interrupt-cells = <3>;
                        #gpio-cells = <3>;

+                       emac_rgmii_pins: emac0-pins {

I prefer emac-rgmii-pins for the node name.

quoted hunk

+                               pins = "PD2", "PD3", "PD4", "PD5", "PD6", "PD7",
+                                      "PD11", "PD12", "PD13", "PD14", "PD18",
+                                      "PD19", "PD21", "PD22", "PD23";
+                               function = "gmac";
+                               drive-strength = <40>;
+                       };
+
                        mmc0_pins: mmc0-pins {
                                pins = "PF0", "PF1", "PF2",
                                       "PF3", "PF4", "PF5";

@@ -266,6 +274,26 @@
                        status = "disabled";
                };

+               emac: ethernet at 1c30000 {
+                       compatible = "allwinner,sun8i-a83t-emac";
+                       syscon = <&syscon>;
+                       reg = <0x01c30000 0x104>;
+                       interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "macirq";
+                       resets = <&ccu 13>;
+                       reset-names = "stmmaceth";
+                       clocks = <&ccu 27>;
+                       clock-names = "stmmaceth";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+
+                       mdio: mdio {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                       };
+               };
+
                gic: interrupt-controller at 1c81000 {
                        compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
                        reg = <0x01c81000 0x1000>,
--

2.13.0

Otherwise,

Reviewed-by: Chen-Yu Tsai <redacted>

Re: [PATCH 0/5] ARM: sunxi: Enable dwmac-sun8i on more boards

From: Maxime Ripard <hidden>
Date: 2017-06-06 17:56:16

On Mon, Jun 05, 2017 at 09:21:25PM +0200, Corentin Labbe wrote:

Hello

This serie enable dwmac-sun8i on more boards.
The first 3 patch enable dwmac-sun8i on some h3/h5 boards.
The last 2 add dwmac-sun8i on a83t.

Corentin Labbe (5):
  ARM: sun8i: orangepi-plus: Enable dwmac-sun8i
  ARM: sun8i: bananapi-m2-plus: Enable dwmac-sun8i
  ARM: sun50i: orangepi-pc2: Enable dwmac-sun8i

Applied the first three, thanks!
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 801 bytes
Desc: not available
URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20170606/01b951a7/attachment-0001.sig>

`h`	back out one level
`j`	next message in thread
`k`	previous message in thread
`l`	drill in
`Esc`	close help / fold thread tree
`?`	toggle this help