[PATCH] ARM: dts: kirkwood: Fix SATA pinmux-ing for TS419

The old board code for the TS419 assigns MPP pins 15 and 16 as SATA
activity signals (and none as SATA presence signals).  Currently the
device tree assigns the SoC's default pinmux groups for SATA, which
conflict with the second Ethernet port.

Reported-by: gmbh at gazeta.pl
Tested-by: gmbh at gazeta.pl
References: https://bugs.debian.org/855017
Cc: stable at vger.kernel.org # 3.15+
Fixes: 934b524b3f49 ("ARM: Kirkwood: Add DT description of QNAP 419")
Signed-off-by: Ben Hutchings <redacted>
---
 arch/arm/boot/dts/kirkwood-ts419.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/arm/boot/dts/kirkwood-ts419.dtsi b/arch/arm/boot/dts/kirkwood-ts419.dtsi
index 02bd53762705..532506cb0f4a 100644
--- a/arch/arm/boot/dts/kirkwood-ts419.dtsi
+++ b/arch/arm/boot/dts/kirkwood-ts419.dtsi

@@ -73,3 +73,11 @@
 		phy-handle = <&ethphy1>;
 	};
 };
+
+&pmx_sata0 {
+	marvell,pins = "mpp15";
+};
+
+&pmx_sata1 {
+	marvell,pins = "mpp16";
+};
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Hello,

Adding in Cc all the maintainers of the Kirkwood platforms.

On Sat, 18 Feb 2017 00:32:51 +0000, Ben Hutchings wrote:

+&pmx_sata0 {
+	marvell,pins = "mpp15";
+};
+
+&pmx_sata1 {
+	marvell,pins = "mpp16";
+};

This is not only muxing mpp15 as sata0 and mpp16 as sata1, but also
removes the muxing of sata0/sata1 pins described in kirkwood-6282.dtsi:

                        pmx_sata0: pmx-sata0 {
                                marvell,pins = "mpp5", "mpp21", "mpp23";
                                marvell,function = "sata0";
                        };
                        pmx_sata1: pmx-sata1 {
                                marvell,pins = "mpp4", "mpp20", "mpp22";
                                marvell,function = "sata1";
                        };

So it means that MPP 4, 5, 20, 21, 22 and 23 will no longer be muxed as
sata0/sata1. Is this really what you want?

Best regards,

Thomas
-- 
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

On Mon, 2017-02-20 at 13:59 +0100, Thomas Petazzoni wrote:

Hello,

Adding in Cc all the maintainers of the Kirkwood platforms.

On Sat, 18 Feb 2017 00:32:51 +0000, Ben Hutchings wrote:

quoted

+&pmx_sata0 {
+	marvell,pins = "mpp15";
+};
+
+&pmx_sata1 {
+	marvell,pins = "mpp16";
+};

This is not only muxing mpp15 as sata0 and mpp16 as sata1, but also
removes the muxing of sata0/sata1 pins described in kirkwood-6282.dtsi:

????????????????????????pmx_sata0: pmx-sata0 {
????????????????????????????????marvell,pins = "mpp5", "mpp21", "mpp23";
????????????????????????????????marvell,function = "sata0";
????????????????????????};
????????????????????????pmx_sata1: pmx-sata1 {
????????????????????????????????marvell,pins = "mpp4", "mpp20", "mpp22";
????????????????????????????????marvell,function = "sata1";
????????????????????????};

So it means that MPP 4, 5, 20, 21, 22 and 23 will no longer be muxed as
sata0/sata1. Is this really what you want?

That is precisely what I intended.  20-23 are used by the second
Ethernet port.  The old board code doesn't assign 4 or 5 at all.

Ben.

-- 
Ben Hutchings
If at first you don't succeed, you're doing about average.

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Hello,

On Mon, 20 Feb 2017 16:40:25 +0000, Ben Hutchings wrote:

That is precisely what I intended.  20-23 are used by the second
Ethernet port.  The old board code doesn't assign 4 or 5 at all.

Then I believe it would be more explicit to have separate pin muxing
configurations for SATA on this board.

Thomas
-- 
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

On Mon, 2017-02-20 at 17:50 +0100, Thomas Petazzoni wrote:

Hello,

On Mon, 20 Feb 2017 16:40:25 +0000, Ben Hutchings wrote:

quoted

That is precisely what I intended.??20-23 are used by the second
Ethernet port.??The old board code doesn't assign 4 or 5 at all.

Then I believe it would be more explicit to have separate pin muxing
configurations for SATA on this board.

You mean, define additional pinmux nodes and override the pinctrl-0
property of &sata?  More like this:

--- a/arch/arm/boot/dts/kirkwood-ts419.dtsi
+++ b/arch/arm/boot/dts/kirkwood-ts419.dtsi

@@ -73,3 +73,19 @@
 		phy-handle = <&ethphy1>;
 	};
 };
+
+&pinctrl {
+	pmx_sata0_ts419: pmx-sata0-ts419 {
+		marvell,pins = "mpp15";
+		marvell,function = "sata0";
+	};
+
+	pmx_sata1_ts419: pmx-sata1-ts419 {
+		marvell,pins = "mpp16";
+		marvell,function = "sata1";
+	};
+};
+
+&sata {
+	pinctrl-0 = <&pmx_sata0_ts419 &pmx_sata1_ts419>;
+};
--- END ---

Ben.

-- 
Ben Hutchings
If at first you don't succeed, you're doing about average.
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Hello,

On Mon, 20 Feb 2017 17:22:38 +0000, Ben Hutchings wrote:

You mean, define additional pinmux nodes and override the pinctrl-0
property of &sata?  More like this:

Yes, exactly.

Thomas
-- 
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com