This series contains the last DT changes required for LCDC support
on da850-lcdk. The first one adds the dumb-vga-dac nodes, the second
limits the maximum pixel clock rate.
v1 -> v2:
- drop patch 3/3 (already merged)
- use max-pixelclock instead of max-bandwidth for display mode limiting
v2 -> v3:
- make the commit message in patch [2/2] more detailed
- move the max-pixelclock property to da850.dtsi as the limit
affects all da850-based boards
v3 -> v4:
- remove the input port from the display node
- move the display ports node to da850-lcdk.dts
- rename the vga_bridge node to vga-bridge
- move the LCDC pins to the LCDC node (from the vga bridge node)
v4 -> v5:
- rename the display label to lcdc
- instead of using the 'dumb-vga-dac' compatible, add bindings for
ti,ths8135 and use it as the vga-bridge node compatible
v5 -> v6:
- drop the endpoint numbers for nodes with single endpoints
- split patch 2/4 from v5 into two separate patches: one adding DT
bindings and one adding actual support for ths8135
v6 -> v7:
- simplified patch 4/5 by removing unnecessary properties from ports
and endpoints nodes
Bartosz Golaszewski (5):
ARM: dts: da850: rename the display node label
drm: bridge: add DT bindings for TI ths8135
drm: bridge: add support for TI ths8135
ARM: dts: da850-lcdk: add the vga-bridge node
ARM: dts: da850: specify the maximum pixel clock rate for tilcdc
.../bindings/display/bridge/ti,ths8135.txt | 46 +++++++++++++++++++
arch/arm/boot/dts/da850-lcdk.dts | 51 ++++++++++++++++++++++
arch/arm/boot/dts/da850.dtsi | 3 +-
drivers/gpu/drm/bridge/dumb-vga-dac.c | 1 +
4 files changed, 100 insertions(+), 1 deletion(-)
create mode 100644 Documentation/devicetree/bindings/display/bridge/ti,ths8135.txt
--
2.9.3
The tilcdc node name is 'display' as per the ePAPR 1.1 recommendation.
The label is also 'display', but change it to 'lcdc' to make it clear
what the underlying hardware is.
Signed-off-by: Bartosz Golaszewski <redacted>
---
arch/arm/boot/dts/da850.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
At maximum CPU frequency of 300 MHz the maximum pixel clock frequency
is 37.5 MHz[1]. We must filter out any mode for which the calculated
pixel clock rate would exceed this value.
Specify the max-pixelclock property for the display node for
da850-lcdk.
[1] http://processors.wiki.ti.com/index.php/OMAP-L1x/C674x/AM1x_LCD_Controller_(LCDC)_Throughput_and_Optimization_Techniques
Signed-off-by: Bartosz Golaszewski <redacted>
---
arch/arm/boot/dts/da850.dtsi | 1 +
1 file changed, 1 insertion(+)
Add the vga-bridge node to the board DT together with corresponding
ports and vga connector. This allows to retrieve the edid info from
the display automatically.
Signed-off-by: Bartosz Golaszewski <redacted>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
arch/arm/boot/dts/da850-lcdk.dts | 51 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 51 insertions(+)
THS8135 is a configurable video DAC, but no configuration is actually
necessary to make it work.
For now use the dumb-vga-dac driver to support it.
Signed-off-by: Bartosz Golaszewski <redacted>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
drivers/gpu/drm/bridge/dumb-vga-dac.c | 1 +
1 file changed, 1 insertion(+)
@@ -0,0 +1,46 @@+THS8135 Video DAC+-----------------++This is the binding for Texas Instruments THS8135 Video DAC bridge.++Required properties:++- compatible: Must be "ti,ths8135"++Required nodes:++This device has two video ports. Their connections are modelled using the OF+graph bindings specified in Documentation/devicetree/bindings/graph.txt.++- Video port 0 for RGB input+- Video port 1 for VGA output++Example+-------++vga-bridge {+ compatible = "ti,ths8135";+ #address-cells = <1>;+ #size-cells = <0>;++ ports {+ #address-cells = <1>;+ #size-cells = <0>;++ port at 0 {+ reg = <0>;++ vga_bridge_in: endpoint {+ remote-endpoint = <&lcdc_out_vga>;+ };+ };++ port at 1 {+ reg = <1>;++ vga_bridge_out: endpoint {+ remote-endpoint = <&vga_con_in>;+ };+ };+ };+};
@@ -0,0 +1,46 @@+THS8135 Video DAC+-----------------++This is the binding for Texas Instruments THS8135 Video DAC bridge.++Required properties:++- compatible: Must be "ti,ths8135"++Required nodes:++This device has two video ports. Their connections are modelled using the OF+graph bindings specified in Documentation/devicetree/bindings/graph.txt.++- Video port 0 for RGB input+- Video port 1 for VGA output++Example+-------++vga-bridge {+ compatible = "ti,ths8135";+ #address-cells = <1>;+ #size-cells = <0>;++ ports {+ #address-cells = <1>;+ #size-cells = <0>;++ port at 0 {+ reg = <0>;++ vga_bridge_in: endpoint {+ remote-endpoint = <&lcdc_out_vga>;+ };+ };++ port at 1 {+ reg = <1>;++ vga_bridge_out: endpoint {+ remote-endpoint = <&vga_con_in>;+ };+ };+ };+};
--
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a Linux Foundation Collaborative Project
From: Tomi Valkeinen <hidden> Date: 2016-12-14 09:56:13
On 13/12/16 12:09, Bartosz Golaszewski wrote:
Add the vga-bridge node to the board DT together with corresponding
ports and vga connector. This allows to retrieve the edid info from
the display automatically.
Signed-off-by: Bartosz Golaszewski <redacted>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
arch/arm/boot/dts/da850-lcdk.dts | 51 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 51 insertions(+)
From: Tomi Valkeinen <hidden> Date: 2016-12-14 09:57:56
On 13/12/16 12:09, Bartosz Golaszewski wrote:
quoted hunk
The tilcdc node name is 'display' as per the ePAPR 1.1 recommendation.
The label is also 'display', but change it to 'lcdc' to make it clear
what the underlying hardware is.
Signed-off-by: Bartosz Golaszewski <redacted>
---
arch/arm/boot/dts/da850.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
From: Sekhar Nori <hidden> Date: 2017-01-02 11:05:31
On Wednesday 14 December 2016 03:27 PM, Tomi Valkeinen wrote:
On 13/12/16 12:09, Bartosz Golaszewski wrote:
quoted
The tilcdc node name is 'display' as per the ePAPR 1.1 recommendation.
The label is also 'display', but change it to 'lcdc' to make it clear
what the underlying hardware is.
Signed-off-by: Bartosz Golaszewski <redacted>
---
arch/arm/boot/dts/da850.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
From: Sekhar Nori <hidden> Date: 2017-01-02 11:17:03
On Wednesday 14 December 2016 03:24 PM, Tomi Valkeinen wrote:
On 13/12/16 12:09, Bartosz Golaszewski wrote:
quoted
Add the vga-bridge node to the board DT together with corresponding
ports and vga connector. This allows to retrieve the edid info from
the display automatically.
Signed-off-by: Bartosz Golaszewski <redacted>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
arch/arm/boot/dts/da850-lcdk.dts | 51 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 51 insertions(+)
Reviewed-by: Tomi Valkeinen <redacted>
Applied to v4.11/dt with Tomi's reviewed-by.
Thanks,
Sekhar
From: Sekhar Nori <hidden> Date: 2017-01-02 11:30:35
On Tuesday 13 December 2016 03:39 PM, Bartosz Golaszewski wrote:
At maximum CPU frequency of 300 MHz the maximum pixel clock frequency
is 37.5 MHz[1]. We must filter out any mode for which the calculated
pixel clock rate would exceed this value.
Specify the max-pixelclock property for the display node for
da850-lcdk.
[1] http://processors.wiki.ti.com/index.php/OMAP-L1x/C674x/AM1x_LCD_Controller_(LCDC)_Throughput_and_Optimization_Techniques
This wiki page is not really a TI datasheet and can change without
notice. I changed this to refer to
http://www.ti.com/lit/ds/symlink/am1808.pdf (SPRS653E, revised March
2014), table 6-110.
Applied to v4.11/dt
Thanks,
Sekhar