5 messages, 2 authors, 2016-11-04 · open the first message on its own page
From: <hidden>
Date: 2016-11-04 08:54:06
From: Gabriel Fernandez <redacted> This patch-set enables RTC & QSPI clocks. Gabriel Fernandez (2): ARM: dts: stm32f429: add LSI and LSE clocks ARM: dts: stm32f429: Add QSPI clock arch/arm/boot/dts/stm32f429.dtsi | 18 ++++++++++++++++++ arch/arm/boot/dts/stm32f469-disco.dts | 4 ++++ 2 files changed, 22 insertions(+) -- 1.9.1
From: <hidden>
Date: 2016-11-04 08:54:04
From: Gabriel Fernandez <redacted> This patch adds the QSPI clock for stm32f469 discovery board. Signed-off-by: Gabriel Fernandez <redacted> --- arch/arm/boot/dts/stm32f469-disco.dts | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/stm32f469-disco.dts b/arch/arm/boot/dts/stm32f469-disco.dts
index e911af8..c43a484 100644
--- a/arch/arm/boot/dts/stm32f469-disco.dts
+++ b/arch/arm/boot/dts/stm32f469-disco.dts@@ -66,6 +66,10 @@ }; }; +&rcc { + compatible = "st,stm32f469-rcc", "st,stm32f42xx-rcc", "st,stm32-rcc"; +}; + &clk_hse { clock-frequency = <8000000>; };
--
1.9.1
From: <hidden>
Date: 2016-11-04 08:54:07
From: Gabriel Fernandez <redacted> This patch adds lsi / lse oscillators. These clocks can be use by RTC clocks. The clock drivers needs to disable the power domain write protection using syscon / regmap to enable these clocks. Signed-off-by: Gabriel Fernandez <redacted> --- arch/arm/boot/dts/stm32f429.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)
diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi
index 336ee4f..2700449 100644
--- a/arch/arm/boot/dts/stm32f429.dtsi
+++ b/arch/arm/boot/dts/stm32f429.dtsi@@ -56,6 +56,18 @@ compatible = "fixed-clock"; clock-frequency = <0>; }; + + clk-lse { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <32768>; + }; + + clk-lsi { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <32000>; + }; }; soc {
@@ -185,6 +197,11 @@ interrupts = <1>, <2>, <3>, <6>, <7>, <8>, <9>, <10>, <23>, <40>, <41>, <42>, <62>, <76>; }; + pwrcfg: power-config at 40007000 { + compatible = "syscon"; + reg = <0x40007000 0x400>; + }; + pin-controller { #address-cells = <1>; #size-cells = <1>;
@@ -340,6 +357,7 @@ compatible = "st,stm32f42xx-rcc", "st,stm32-rcc"; reg = <0x40023800 0x400>; clocks = <&clk_hse>; + st,syscfg = <&pwrcfg>; }; dma1: dma-controller at 40026000 {
--
1.9.1
From: Alexandre Torgue <hidden>
Date: 2016-11-04 10:16:41
Gabriel, On 11/04/2016 09:52 AM, gabriel.fernandez at st.com wrote:
From: Gabriel Fernandez <redacted> This patch adds lsi / lse oscillators. These clocks can be use by RTC clocks. The clock drivers needs to disable the power domain write protection using syscon / regmap to enable these clocks.
Is it the same than you sent in last series ? If yes I will take it directly as review has already been done. regards Alex
Signed-off-by: Gabriel Fernandez <redacted> --- arch/arm/boot/dts/stm32f429.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi index 336ee4f..2700449 100644 --- a/arch/arm/boot/dts/stm32f429.dtsi +++ b/arch/arm/boot/dts/stm32f429.dtsi@@ -56,6 +56,18 @@ compatible = "fixed-clock"; clock-frequency = <0>; }; + + clk-lse { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <32768>; + }; + + clk-lsi { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <32000>; + }; }; soc {@@ -185,6 +197,11 @@ interrupts = <1>, <2>, <3>, <6>, <7>, <8>, <9>, <10>, <23>, <40>, <41>, <42>, <62>, <76>; }; + pwrcfg: power-config at 40007000 { + compatible = "syscon"; + reg = <0x40007000 0x400>; + }; + pin-controller { #address-cells = <1>; #size-cells = <1>;@@ -340,6 +357,7 @@ compatible = "st,stm32f42xx-rcc", "st,stm32-rcc"; reg = <0x40023800 0x400>; clocks = <&clk_hse>; + st,syscfg = <&pwrcfg>; }; dma1: dma-controller at 40026000 {
From: Gabriel Fernandez <hidden>
Date: 2016-11-04 10:18:05
Hi Alexandre, On 11/04/2016 11:15 AM, Alexandre Torgue wrote:
Gabriel, On 11/04/2016 09:52 AM, gabriel.fernandez at st.com wrote:quoted
From: Gabriel Fernandez <redacted> This patch adds lsi / lse oscillators. These clocks can be use by RTC clocks. The clock drivers needs to disable the power domain write protection using syscon / regmap to enable these clocks.Is it the same than you sent in last series ? If yes I will take it directly as review has already been done.
Yes BR Gabriel.
regards Alexquoted
Signed-off-by: Gabriel Fernandez <redacted> --- arch/arm/boot/dts/stm32f429.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)diff --git a/arch/arm/boot/dts/stm32f429.dtsib/arch/arm/boot/dts/stm32f429.dtsi index 336ee4f..2700449 100644--- a/arch/arm/boot/dts/stm32f429.dtsi +++ b/arch/arm/boot/dts/stm32f429.dtsi@@ -56,6 +56,18 @@ compatible = "fixed-clock"; clock-frequency = <0>; }; + + clk-lse { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <32768>; + }; + + clk-lsi { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <32000>; + }; }; soc {@@ -185,6 +197,11 @@ interrupts = <1>, <2>, <3>, <6>, <7>, <8>, <9>, <10>,<23>, <40>, <41>, <42>, <62>, <76>; }; + pwrcfg: power-config at 40007000 { + compatible = "syscon"; + reg = <0x40007000 0x400>; + }; + pin-controller { #address-cells = <1>; #size-cells = <1>;@@ -340,6 +357,7 @@ compatible = "st,stm32f42xx-rcc", "st,stm32-rcc"; reg = <0x40023800 0x400>; clocks = <&clk_hse>; + st,syscfg = <&pwrcfg>; }; dma1: dma-controller at 40026000 {