[PATCH 0/3] arm64: marvell: additional DT changes for Armada 7K/8K

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4 messages, 1 author, 2016-02-24 · open the first message on its own page

[PATCH 0/3] arm64: marvell: additional DT changes for Armada 7K/8K

From: Thomas Petazzoni <hidden>
Date: 2016-02-24 15:16:44 

Dear mvebu maintainers,

This small set of three patches apply on top of the changes already
merged in the mvebu/dt64 branch, and make some changes to the 7K/8K
Device Trees:

 - Document that the DT bindings for this platform are unstable.

 - Adjust the armada-ap806.dtsi to the clock DT binding change which
   was requested by Rob Herring.

 - Re-order DT nodes by unit address.

Thanks!

Thomas

Thomas Petazzoni (3):
  dt-bindings: arm/marvell: ABI unstability warning about Marvell 7K/8K
  arm64: marvell: update Armada AP806 clock description
  arm64: marvell: re-order Device Tree nodes for Armada AP806

 .../bindings/arm/marvell/armada-7k-8k.txt          | 12 +++
 arch/arm64/boot/dts/marvell/armada-ap806.dtsi      | 93 +++++++++++-----------
 2 files changed, 60 insertions(+), 45 deletions(-)

-- 
2.6.4

[PATCH 1/3] dt-bindings: arm/marvell: ABI unstability warning about Marvell 7K/8K

From: Thomas Petazzoni <hidden>
Date: 2016-02-24 15:16:45 

Since we are still very early in the support of Marvell Armada 7/8K
chips and those chips are significantly different from earlier 32 bits
Armada SOCs, it is difficult to commit to Device Tree ABI stability at
this point.

Therefore, this commit adds a warning to the Marvell 7K/8K DT binding
documentation to indicate that the bindings are for the moment
unstable.

Signed-off-by: Thomas Petazzoni <redacted>
---
 .../devicetree/bindings/arm/marvell/armada-7k-8k.txt         | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.txt b/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.txt
index df98a9c..758b3ae 100644
--- a/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.txt
+++ b/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.txt
@@ -1,6 +1,18 @@
 Marvell Armada 7K/8K Platforms Device Tree Bindings
 ---------------------------------------------------
 
+Work in progress statement:
+
+Device tree files and bindings applying to Marvell Armada 7K and 8K
+SoCs and boards are considered "unstable". Any Marvell Armada 7K/8K
+device tree binding may change at any time. Be sure to use a device
+tree binary and a kernel image generated from the same source tree.
+
+Please refer to Documentation/devicetree/bindings/ABI.txt for a
+definition of a stable binding/ABI.
+
+---------------------------------------------------------------
+
 Boards using a SoC of the Marvell Armada 7K or 8K families must carry
 the following root node property:
 
-- 
2.6.4

[PATCH 2/3] arm64: marvell: update Armada AP806 clock description

From: Thomas Petazzoni <hidden>
Date: 2016-02-24 15:16:46 

Following the review from the DT maintainers, the DT binding for the
clocks has changed, and we now use a DFX server node exposing a
syscon, with the clock nodes being subnodes of the DFX server
node. This commit therefore updates the AP806 Device Tree file to use
this new DT binding.

Signed-off-by: Thomas Petazzoni <redacted>
---
 arch/arm64/boot/dts/marvell/armada-ap806.dtsi | 37 +++++++++++++++------------
 1 file changed, 20 insertions(+), 17 deletions(-)

diff --git a/arch/arm64/boot/dts/marvell/armada-ap806.dtsi b/arch/arm64/boot/dts/marvell/armada-ap806.dtsi
index 63f25ce..88e3348 100644
--- a/arch/arm64/boot/dts/marvell/armada-ap806.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-ap806.dtsi
@@ -179,23 +179,6 @@
 
 			};
 
-			coreclk: clk at 0x6F8204 {
-				compatible = "marvell,armada-ap806-core-clock";
-				reg = <0x6F8204 0x04>;
-				#clock-cells = <1>;
-				clock-output-names = "ddr", "ring", "cpu";
-			};
-
-			ringclk: clk at 0x6F8250 {
-				compatible = "marvell,armada-ap806-ring-clock";
-				reg = <0x6F8250 0x04>;
-				#clock-cells = <1>;
-				clock-output-names = "ring-0", "ring-2",
-						     "ring-3", "ring-4",
-						     "ring-5";
-				clocks = <&coreclk 1>;
-			};
-
 			xor0 at 400000 {
 				compatible = "marvell,mv-xor-v2";
 				reg = <0x400000 0x1000>,
@@ -227,6 +210,26 @@
 				msi-parent = <&gic_v2m0>;
 				dma-coherent;
 			};
+
+			dfx-server at 6f8000 {
+				compatible = "simple-mfd", "syscon";
+				reg = <0x6f8000 0x70000>;
+
+				coreclk: clk at 204 {
+					compatible = "marvell,armada-ap806-core-clock";
+					#clock-cells = <1>;
+					clock-output-names = "ddr", "ring", "cpu";
+				};
+
+				ringclk: clk at 250 {
+					compatible = "marvell,armada-ap806-ring-clock";
+					#clock-cells = <1>;
+					clock-output-names = "ring-0", "ring-2",
+							     "ring-3", "ring-4",
+							     "ring-5";
+					clocks = <&coreclk 1>;
+				};
+			};
 		};
 	};
 
-- 
2.6.4

[PATCH 3/3] arm64: marvell: re-order Device Tree nodes for Armada AP806

From: Thomas Petazzoni <hidden>
Date: 2016-02-24 15:16:47 

The DT nodes representing the XOR engines were not placed at the
proper location to comply with the requirement of ordering DT nodes by
their unit address. This commit fixes this mistake.

Signed-off-by: Thomas Petazzoni <redacted>
---
 arch/arm64/boot/dts/marvell/armada-ap806.dtsi | 64 +++++++++++++--------------
 1 file changed, 32 insertions(+), 32 deletions(-)

diff --git a/arch/arm64/boot/dts/marvell/armada-ap806.dtsi b/arch/arm64/boot/dts/marvell/armada-ap806.dtsi
index 88e3348..556a92b 100644
--- a/arch/arm64/boot/dts/marvell/armada-ap806.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-ap806.dtsi
@@ -136,6 +136,38 @@
 				marvell,spi-base = <128>, <136>, <144>, <152>;
 			};
 
+			xor0 at 400000 {
+				compatible = "marvell,mv-xor-v2";
+				reg = <0x400000 0x1000>,
+				      <0x410000 0x1000>;
+				msi-parent = <&gic_v2m0>;
+				dma-coherent;
+			};
+
+			xor1 at 420000 {
+				compatible = "marvell,mv-xor-v2";
+				reg = <0x420000 0x1000>,
+				      <0x430000 0x1000>;
+				msi-parent = <&gic_v2m0>;
+				dma-coherent;
+			};
+
+			xor2 at 440000 {
+				compatible = "marvell,mv-xor-v2";
+				reg = <0x440000 0x1000>,
+				      <0x450000 0x1000>;
+				msi-parent = <&gic_v2m0>;
+				dma-coherent;
+			};
+
+			xor3 at 460000 {
+				compatible = "marvell,mv-xor-v2";
+				reg = <0x460000 0x1000>,
+				      <0x470000 0x1000>;
+				msi-parent = <&gic_v2m0>;
+				dma-coherent;
+			};
+
 			spi0: spi at 510600 {
 				compatible = "marvell,armada-380-spi";
 				reg = <0x510600 0x50>;
@@ -179,38 +211,6 @@
 
 			};
 
-			xor0 at 400000 {
-				compatible = "marvell,mv-xor-v2";
-				reg = <0x400000 0x1000>,
-				      <0x410000 0x1000>;
-				msi-parent = <&gic_v2m0>;
-				dma-coherent;
-			};
-
-			xor1 at 420000 {
-				compatible = "marvell,mv-xor-v2";
-				reg = <0x420000 0x1000>,
-				      <0x430000 0x1000>;
-				msi-parent = <&gic_v2m0>;
-				dma-coherent;
-			};
-
-			xor2 at 440000 {
-				compatible = "marvell,mv-xor-v2";
-				reg = <0x440000 0x1000>,
-				      <0x450000 0x1000>;
-				msi-parent = <&gic_v2m0>;
-				dma-coherent;
-			};
-
-			xor3 at 460000 {
-				compatible = "marvell,mv-xor-v2";
-				reg = <0x460000 0x1000>,
-				      <0x470000 0x1000>;
-				msi-parent = <&gic_v2m0>;
-				dma-coherent;
-			};
-
 			dfx-server at 6f8000 {
 				compatible = "simple-mfd", "syscon";
 				reg = <0x6f8000 0x70000>;
-- 
2.6.4
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