Here are some new patches that I've collected as part of the randconfig
testing. I don't think any of these are urgent, but it would be nice
to get them merged to cut down on the noise in randconfig testing.
The NR_IPIS patch is the only one that I expect to matter to real
users, but I think it's been broken for several years without anyone
noticing.
Arnd
When configuring the kernel for big-endian, we set either BE-8 or BE-32
based on the CPU architecture level. Until linux-4.4, we did not have
any ARMv7-M platform allowing big-endian builds, but now i.MX/Vybrid
is in that category, adn we get a build error because of this:
arch/arm/kernel/module-plts.c: In function 'get_module_plt':
arch/arm/kernel/module-plts.c:60:46: error: implicit declaration of function '__opcode_to_mem_thumb32' [-Werror=implicit-function-declaration]
This comes down to picking the wrong default, ARMv7-M uses BE8
like ARMv7-A does. Changing the default gets the kernel to compile
and presumably works.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
arch/arm/mm/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
From: Nicolas Pitre <hidden> Date: 2016-02-18 16:06:13
On Thu, 18 Feb 2016, Arnd Bergmann wrote:
When configuring the kernel for big-endian, we set either BE-8 or BE-32
based on the CPU architecture level. Until linux-4.4, we did not have
any ARMv7-M platform allowing big-endian builds, but now i.MX/Vybrid
is in that category, adn we get a build error because of this:
arch/arm/kernel/module-plts.c: In function 'get_module_plt':
arch/arm/kernel/module-plts.c:60:46: error: implicit declaration of function '__opcode_to_mem_thumb32' [-Werror=implicit-function-declaration]
This comes down to picking the wrong default, ARMv7-M uses BE8
like ARMv7-A does. Changing the default gets the kernel to compile
and presumably works.
Was it tested without BE8 when it was submitted upstream? I don't think
you can switch this freely on a given hardware platform and expect it to
still work.
On Thursday 18 February 2016 11:06:08 Nicolas Pitre wrote:
On Thu, 18 Feb 2016, Arnd Bergmann wrote:
quoted
When configuring the kernel for big-endian, we set either BE-8 or BE-32
based on the CPU architecture level. Until linux-4.4, we did not have
any ARMv7-M platform allowing big-endian builds, but now i.MX/Vybrid
is in that category, adn we get a build error because of this:
arch/arm/kernel/module-plts.c: In function 'get_module_plt':
arch/arm/kernel/module-plts.c:60:46: error: implicit declaration of function '__opcode_to_mem_thumb32' [-Werror=implicit-function-declaration]
This comes down to picking the wrong default, ARMv7-M uses BE8
like ARMv7-A does. Changing the default gets the kernel to compile
and presumably works.
Was it tested without BE8 when it was submitted upstream? I don't think
you can switch this freely on a given hardware platform and expect it to
still work.
mach-imx contains a number of different SoCs, and one SoC was recently
tested successfully after a number of endianess bugs got fixed. This was
an i.mx6 using a Cortex-A9 core, but we are now also able to build
vybrid vf610 big-endian based on that selection. This SoC supports
Linux running either on its Cortex-A5 or its Cortex-M3 (or M4?) cores.
I am rather sure nobody has ever run Linux in big-endian mode on the
Cortex-M platform, specifically because it was always wrong and could
not be enabled in Kconfig.
Arnd
From: Vladimir Murzin <hidden> Date: 2016-02-19 08:47:59
On 18/02/16 16:12, Arnd Bergmann wrote:
On Thursday 18 February 2016 11:06:08 Nicolas Pitre wrote:
quoted
On Thu, 18 Feb 2016, Arnd Bergmann wrote:
quoted
When configuring the kernel for big-endian, we set either BE-8 or BE-32
based on the CPU architecture level. Until linux-4.4, we did not have
any ARMv7-M platform allowing big-endian builds, but now i.MX/Vybrid
is in that category, adn we get a build error because of this:
arch/arm/kernel/module-plts.c: In function 'get_module_plt':
arch/arm/kernel/module-plts.c:60:46: error: implicit declaration of function '__opcode_to_mem_thumb32' [-Werror=implicit-function-declaration]
This comes down to picking the wrong default, ARMv7-M uses BE8
like ARMv7-A does. Changing the default gets the kernel to compile
and presumably works.
Was it tested without BE8 when it was submitted upstream? I don't think
you can switch this freely on a given hardware platform and expect it to
still work.
mach-imx contains a number of different SoCs, and one SoC was recently
tested successfully after a number of endianess bugs got fixed. This was
an i.mx6 using a Cortex-A9 core, but we are now also able to build
vybrid vf610 big-endian based on that selection. This SoC supports
Linux running either on its Cortex-A5 or its Cortex-M3 (or M4?) cores.
I am rather sure nobody has ever run Linux in big-endian mode on the
Cortex-M platform, specifically because it was always wrong and could
not be enabled in Kconfig.
Ah, it explains why my quick attempt to enable BE for MPS2 (M-class
platform) failed. With this patch applied I'm able to see Linux booting
on MPS2 FVP model in BE, not complete boot but it might be due to other
reasons. So this patch definitely improves things for me, if it helps
Tested-by: Vladimir Murzin <redacted>
Cheers
Vladimir
On Friday 19 February 2016 08:47:47 Vladimir Murzin wrote:
Ah, it explains why my quick attempt to enable BE for MPS2 (M-class
platform) failed. With this patch applied I'm able to see Linux booting
on MPS2 FVP model in BE, not complete boot but it might be due to other
reasons. So this patch definitely improves things for me, if it helps
Tested-by: Vladimir Murzin <redacted>
When function tracing for IPIs is enabled, we get a warning for an
overflow of the ipi_types array with the IPI_CPU_BACKTRACE type
as triggered by raise_nmi():
arch/arm/kernel/smp.c: In function 'raise_nmi':
arch/arm/kernel/smp.c:489:2: error: array subscript is above array bounds [-Werror=array-bounds]
trace_ipi_raise(target, ipi_types[ipinr]);
This is a correct warning as we actually overflow the array here.
To make the tracing work correctly, this extends the array by one
entry and increases NR_IPI accordingly.
This only works after patch e7273ff49acf ("ARM: 8488/1: Make
IPI_CPU_BACKTRACE a "non-secure" SGI"), which changed the number
assignment from '15' to '8'. If we decide to backport this patch
to stable kernels, we probably need to backport e7273ff49acf
as well.
As far as I can tell, the problem has existed since the tracepoints
were originally added, but it only triggered a gcc warning with the
later change to NR_IPIS.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Fixes: e7273ff49acf ("ARM: 8488/1: Make IPI_CPU_BACKTRACE a "non-secure" SGI")
Fixes: 365ec7b17327 ("ARM: add IPI tracepoints") # v3.17
---
arch/arm/include/asm/hardirq.h | 2 +-
arch/arm/kernel/smp.c | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
From: Marc Zyngier <hidden> Date: 2016-02-18 14:26:36
Hi Arnd,
On 18/02/16 14:01, Arnd Bergmann wrote:
When function tracing for IPIs is enabled, we get a warning for an
overflow of the ipi_types array with the IPI_CPU_BACKTRACE type
as triggered by raise_nmi():
arch/arm/kernel/smp.c: In function 'raise_nmi':
arch/arm/kernel/smp.c:489:2: error: array subscript is above array bounds [-Werror=array-bounds]
trace_ipi_raise(target, ipi_types[ipinr]);
This is a correct warning as we actually overflow the array here.
To make the tracing work correctly, this extends the array by one
entry and increases NR_IPI accordingly.
This only works after patch e7273ff49acf ("ARM: 8488/1: Make
IPI_CPU_BACKTRACE a "non-secure" SGI"), which changed the number
assignment from '15' to '8'. If we decide to backport this patch
to stable kernels, we probably need to backport e7273ff49acf
as well.
I may actually have made the bug worse in 89d798b ("ARM: 8487/1: Remove
IPI_CALL_FUNC_SINGLE"), which changed NR_IPI from 8 to 7. It would need
to be backported as well (as otherwise we don't have a free non-secure
IP slot).
As far as I can tell, the problem has existed since the tracepoints
were originally added, but it only triggered a gcc warning with the
later change to NR_IPIS.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Fixes: e7273ff49acf ("ARM: 8488/1: Make IPI_CPU_BACKTRACE a "non-secure" SGI")
Fixes: 365ec7b17327 ("ARM: add IPI tracepoints") # v3.17
Acked-by: Marc Zyngier <redacted>
Thanks,
M.
--
Jazz is not dead. It just smells funny...
From: Russell King - ARM Linux <hidden> Date: 2016-02-18 14:37:28
On Thu, Feb 18, 2016 at 03:01:54PM +0100, Arnd Bergmann wrote:
When function tracing for IPIs is enabled, we get a warning for an
overflow of the ipi_types array with the IPI_CPU_BACKTRACE type
as triggered by raise_nmi():
arch/arm/kernel/smp.c: In function 'raise_nmi':
arch/arm/kernel/smp.c:489:2: error: array subscript is above array bounds [-Werror=array-bounds]
trace_ipi_raise(target, ipi_types[ipinr]);
We really don't want to treat the backtrace IPI as a normal IPI at all -
we want it to invoke the least amount of code possible. Hence this code
which avoids the issue:
if ((unsigned)ipinr < NR_IPI) {
trace_ipi_entry_rcuidle(ipi_types[ipinr]);
__inc_irq_stat(cpu, ipi_irqs[ipinr]);
}
However, what's missing is that the addition of tracing here missed
that CPU_BACKTRACE is not to be traced. The call in raise_nmi()
should have been converted to __smp_cross_call() to avoid the
tracing code.
--
RMK's Patch system: http://www.arm.linux.org.uk/developer/patches/
FTTC broadband for 0.8mile line: currently@9.6Mbps down 400kbps up
according to speedtest.net.
On Thursday 18 February 2016 14:37:09 Russell King - ARM Linux wrote:
On Thu, Feb 18, 2016 at 03:01:54PM +0100, Arnd Bergmann wrote:
quoted
When function tracing for IPIs is enabled, we get a warning for an
overflow of the ipi_types array with the IPI_CPU_BACKTRACE type
as triggered by raise_nmi():
arch/arm/kernel/smp.c: In function 'raise_nmi':
arch/arm/kernel/smp.c:489:2: error: array subscript is above array bounds [-Werror=array-bounds]
trace_ipi_raise(target, ipi_types[ipinr]);
We really don't want to treat the backtrace IPI as a normal IPI at all -
we want it to invoke the least amount of code possible. Hence this code
which avoids the issue:
if ((unsigned)ipinr < NR_IPI) {
trace_ipi_entry_rcuidle(ipi_types[ipinr]);
__inc_irq_stat(cpu, ipi_irqs[ipinr]);
}
However, what's missing is that the addition of tracing here missed
that CPU_BACKTRACE is not to be traced. The call in raise_nmi()
should have been converted to __smp_cross_call() to avoid the
tracing code.
I've replaced the patch locally with the version below now, and
will throw it into the randconfig build test infrastructure to
make sure I didn't screw up in an obvious way here.
Arnd
From 7528c9b0558fdf4de785e62e61f0dd2ffe874110 Mon Sep 17 00:00:00 2001
From: Arnd Bergmann <arnd@arndb.de>
Date: Sun, 31 Jan 2016 22:26:21 +0100
Subject: [PATCH] ARM: prevent tracing IPI_CPU_BACKTRACE
When function tracing for IPIs is enabled, we get a warning for an
overflow of the ipi_types array with the IPI_CPU_BACKTRACE type
as triggered by raise_nmi():
arch/arm/kernel/smp.c: In function 'raise_nmi':
arch/arm/kernel/smp.c:489:2: error: array subscript is above array bounds [-Werror=array-bounds]
trace_ipi_raise(target, ipi_types[ipinr]);
This is a correct warning as we actually overflow the array here.
This patch raise_nmi() to call __smp_cross_call() instead of
smp_cross_call(), to avoid calling into ftrace. For clarification,
I'm also adding a two new code comments describing how this one
is special.
The warning appears to have shown up after patch e7273ff49acf
("ARM: 8488/1: Make IPI_CPU_BACKTRACE a "non-secure" SGI"), which
changed the number assignment from '15' to '8', but as far as I can
tell has existed since the IPI tracepoints were first introduced.
If we decide to backport this patch to stable kernels, we probably
need to backport e7273ff49acf as well.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Fixes: e7273ff49acf ("ARM: 8488/1: Make IPI_CPU_BACKTRACE a "non-secure" SGI")
Fixes: 365ec7b17327 ("ARM: add IPI tracepoints") # v3.17
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Hi,
Any conclusion on this patch? The coverity tool is still complaining
error on the issue which this patch can fix.
Thanks,
Chunyan
On 18 February 2016 at 23:18, Arnd Bergmann [off-list ref] wrote:
quoted hunk
On Thursday 18 February 2016 14:37:09 Russell King - ARM Linux wrote:
quoted
On Thu, Feb 18, 2016 at 03:01:54PM +0100, Arnd Bergmann wrote:
quoted
When function tracing for IPIs is enabled, we get a warning for an
overflow of the ipi_types array with the IPI_CPU_BACKTRACE type
as triggered by raise_nmi():
arch/arm/kernel/smp.c: In function 'raise_nmi':
arch/arm/kernel/smp.c:489:2: error: array subscript is above array bounds [-Werror=array-bounds]
trace_ipi_raise(target, ipi_types[ipinr]);
We really don't want to treat the backtrace IPI as a normal IPI at all -
we want it to invoke the least amount of code possible. Hence this code
which avoids the issue:
if ((unsigned)ipinr < NR_IPI) {
trace_ipi_entry_rcuidle(ipi_types[ipinr]);
__inc_irq_stat(cpu, ipi_irqs[ipinr]);
}
However, what's missing is that the addition of tracing here missed
that CPU_BACKTRACE is not to be traced. The call in raise_nmi()
should have been converted to __smp_cross_call() to avoid the
tracing code.
I've replaced the patch locally with the version below now, and
will throw it into the randconfig build test infrastructure to
make sure I didn't screw up in an obvious way here.
Arnd
From 7528c9b0558fdf4de785e62e61f0dd2ffe874110 Mon Sep 17 00:00:00 2001
From: Arnd Bergmann <arnd@arndb.de>
Date: Sun, 31 Jan 2016 22:26:21 +0100
Subject: [PATCH] ARM: prevent tracing IPI_CPU_BACKTRACE
When function tracing for IPIs is enabled, we get a warning for an
overflow of the ipi_types array with the IPI_CPU_BACKTRACE type
as triggered by raise_nmi():
arch/arm/kernel/smp.c: In function 'raise_nmi':
arch/arm/kernel/smp.c:489:2: error: array subscript is above array bounds [-Werror=array-bounds]
trace_ipi_raise(target, ipi_types[ipinr]);
This is a correct warning as we actually overflow the array here.
This patch raise_nmi() to call __smp_cross_call() instead of
smp_cross_call(), to avoid calling into ftrace. For clarification,
I'm also adding a two new code comments describing how this one
is special.
The warning appears to have shown up after patch e7273ff49acf
("ARM: 8488/1: Make IPI_CPU_BACKTRACE a "non-secure" SGI"), which
changed the number assignment from '15' to '8', but as far as I can
tell has existed since the IPI tracepoints were first introduced.
If we decide to backport this patch to stable kernels, we probably
need to backport e7273ff49acf as well.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Fixes: e7273ff49acf ("ARM: 8488/1: Make IPI_CPU_BACKTRACE a "non-secure" SGI")
Fixes: 365ec7b17327 ("ARM: add IPI tracepoints") # v3.17
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
free_memmap is an inline function, but gcc may choose to ignore that
when CONFIG_OPTIMIZE_INLINING is set. In that case it is put in the
.text section, causing a kbuild warning:
WARNING: vmlinux.o(.text.unlikely+0x1a0): Section mismatch in reference from the function free_memmap() to the function .init.text:__memblock_free_early()
The function free_memmap() references
the function __init __memblock_free_early().
This is often because free_memmap lacks a __init
annotation or the annotation of __memblock_free_early is wrong.
FATAL: modpost: Section mismatches detected.
Set CONFIG_SECTION_MISMATCH_WARN_ONLY=y to allow them.
This marks the function both inline and __init, which is a
correct annotation and avoids the problem.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
arch/arm/mm/init.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
From: Nicolas Pitre <hidden> Date: 2016-02-18 15:56:05
On Thu, 18 Feb 2016, Arnd Bergmann wrote:
free_memmap is an inline function, but gcc may choose to ignore that
when CONFIG_OPTIMIZE_INLINING is set. In that case it is put in the
.text section, causing a kbuild warning:
WARNING: vmlinux.o(.text.unlikely+0x1a0): Section mismatch in reference from the function free_memmap() to the function .init.text:__memblock_free_early()
The function free_memmap() references
the function __init __memblock_free_early().
This is often because free_memmap lacks a __init
annotation or the annotation of __memblock_free_early is wrong.
FATAL: modpost: Section mismatches detected.
Set CONFIG_SECTION_MISMATCH_WARN_ONLY=y to allow them.
This marks the function both inline and __init, which is a
correct annotation and avoids the problem.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
For platforms that are not yet converted to ARCH_MULTIPLATFORM,
we can disable CONFIG_ARM_PATCH_PHYS_VIRT, which in turn requires
setting a correct address here.
As we actualy know what all the values are supposed to be based
on the old mach/memory.h header file contents (from git history),
we can just add them here.
This also solves a problem in Kconfig where 'make randconfig'
fails to continue if no number is selected for a 'hex' option.
Users can still override the number at configuration time, e.g.
when the memory visible to the kernel starts at a nonstandard
address on some machine, but it should no longer be required
now.
To make this foolproof, another patch is required in mach-davinci
to prevent a configuration with both DMx and DA8xx enabled but
ARM_PATCH_PHYS_VIRT disabled. The two patches however can be
merged independently as there is no direct dependency between
them.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
arch/arm/Kconfig | 20 +++++++++++++++++---
1 file changed, 17 insertions(+), 3 deletions(-)
From: Nicolas Pitre <hidden> Date: 2016-02-18 16:02:37
On Thu, 18 Feb 2016, Arnd Bergmann wrote:
For platforms that are not yet converted to ARCH_MULTIPLATFORM,
we can disable CONFIG_ARM_PATCH_PHYS_VIRT, which in turn requires
setting a correct address here.
As we actualy know what all the values are supposed to be based
on the old mach/memory.h header file contents (from git history),
we can just add them here.
This also solves a problem in Kconfig where 'make randconfig'
fails to continue if no number is selected for a 'hex' option.
Users can still override the number at configuration time, e.g.
when the memory visible to the kernel starts at a nonstandard
address on some machine, but it should no longer be required
now.
To make this foolproof, another patch is required in mach-davinci
to prevent a configuration with both DMx and DA8xx enabled but
ARM_PATCH_PHYS_VIRT disabled. The two patches however can be
merged independently as there is no direct dependency between
them.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Nicolas Pitre <redacted>
Is there a way to provide a default for defaults?
On Thursday 18 February 2016 11:02:33 Nicolas Pitre wrote:
Acked-by: Nicolas Pitre <redacted>
Is there a way to provide a default for defaults?
We could have something like
config PHYS_OFFSET_0
bool
config PHYS_OFFSET_1
bool
config PHYS_OFFSET_2
bool
... (we need 8 of the 16 possible addresses)
config PHYS_OFFSET
hex "Physical address of main memory" if MMU
default DRAM_BASE if !MMU
default 0x00000000 if PHYS_OFFSET_0
default 0x10000000 if PHYS_OFFSET_1
default 0x20000000 if PHYS_OFFSET_2
default 0x30000000 if PHYS_OFFSET_3
default 0x70000000 if PHYS_OFFSET_7
default 0x80000000 if PHYS_OFFSET_8
default 0xa0000000 if PHYS_OFFSET_A
default 0xc0000000 if PHYS_OFFSET_C
and then select one of the bool symbols from each platform.
Would that address your question?
FWIW, that would also let us do:
config XIP_KERNEL
bool "Kernel Execute-In-Place from ROM"
depends on PHYS_OFFSET_0 || PHYS_OFFSET_1 || PHYS_OFFSET_2 ||
PHYS_OFFSET_3 || PHYS_OFFSET_7 || PHYS_OFFSET_8 ||
PHYS_OFFSET_A || PHYS_OFFSET_C
We can probably come up with a more elaborate way to prevent configurations
that have more than one of these set.
Arnd
From: Chris Brandt <Chris.Brandt@renesas.com> Date: 2016-02-19 14:29:08
On 19 Feb 2016, Arnd Bergmann wrote:
On Thursday 18 February 2016 11:02:33 Nicolas Pitre wrote:
quoted
Acked-by: Nicolas Pitre <redacted>
Is there a way to provide a default for defaults?
We could have something like
config PHYS_OFFSET_0
bool
config PHYS_OFFSET_1
bool
config PHYS_OFFSET_2
bool
... (we need 8 of the 16 possible addresses)
config PHYS_OFFSET
hex "Physical address of main memory" if MMU
default DRAM_BASE if !MMU
default 0x00000000 if PHYS_OFFSET_0
default 0x10000000 if PHYS_OFFSET_1
default 0x20000000 if PHYS_OFFSET_2
default 0x30000000 if PHYS_OFFSET_3
default 0x70000000 if PHYS_OFFSET_7
default 0x80000000 if PHYS_OFFSET_8
default 0xa0000000 if PHYS_OFFSET_A
default 0xc0000000 if PHYS_OFFSET_C
and then select one of the bool symbols from each platform.
Would that address your question?
Here's a question:
Can we just get rid of PHYS_OFFSET???
If it's only used at boot for XIP systems, we could:
A) pass it in via an unused register like atags and DT
or
B) just assume that atags or DT is in RAM, so round down to the nearest section and assume that is the start of your RAM
If it is needed after initial boot, then on first boot we save what was passed in from the boot loader for later use.
Chris
On Friday 19 February 2016 14:29:00 Chris Brandt wrote:
On 19 Feb 2016, Arnd Bergmann wrote:
quoted
On Thursday 18 February 2016 11:02:33 Nicolas Pitre wrote:
quoted
Acked-by: Nicolas Pitre <redacted>
Is there a way to provide a default for defaults?
We could have something like
config PHYS_OFFSET_0
bool
config PHYS_OFFSET_1
bool
config PHYS_OFFSET_2
bool
... (we need 8 of the 16 possible addresses)
config PHYS_OFFSET
hex "Physical address of main memory" if MMU
default DRAM_BASE if !MMU
default 0x00000000 if PHYS_OFFSET_0
default 0x10000000 if PHYS_OFFSET_1
default 0x20000000 if PHYS_OFFSET_2
default 0x30000000 if PHYS_OFFSET_3
default 0x70000000 if PHYS_OFFSET_7
default 0x80000000 if PHYS_OFFSET_8
default 0xa0000000 if PHYS_OFFSET_A
default 0xc0000000 if PHYS_OFFSET_C
and then select one of the bool symbols from each platform.
Would that address your question?
Here's a question:
Can we just get rid of PHYS_OFFSET???
If it's only used at boot for XIP systems, we could:
A) pass it in via an unused register like atags and DT
or
B) just assume that atags or DT is in RAM, so round down to the nearest section and assume that is the start of your RAM
If it is needed after initial boot, then on first boot we save what was passed in from the boot loader for later use.
Hmm, you mean making phys_offset a runtime variable instead
of patching it at early boot time in the instructions?
I have no idea if that works, how much effort it would be,
or how much it would enlarge the kernel image size, but
you can definitely try.
Of course we must not break existing platforms using XIP_KERNEL
already, but the installed base among systems that are upgrading
to modern kernels is very small now, given how all modern platforms
don't support XIP_KERNEL today, or have no MMU to start with.
Arnd
From: Russell King - ARM Linux <hidden> Date: 2016-02-19 16:44:00
On Fri, Feb 19, 2016 at 04:34:51PM +0100, Arnd Bergmann wrote:
On Friday 19 February 2016 14:29:00 Chris Brandt wrote:
quoted
On 19 Feb 2016, Arnd Bergmann wrote:
quoted
On Thursday 18 February 2016 11:02:33 Nicolas Pitre wrote:
quoted
Acked-by: Nicolas Pitre <redacted>
Is there a way to provide a default for defaults?
We could have something like
config PHYS_OFFSET_0
bool
config PHYS_OFFSET_1
bool
config PHYS_OFFSET_2
bool
... (we need 8 of the 16 possible addresses)
config PHYS_OFFSET
hex "Physical address of main memory" if MMU
default DRAM_BASE if !MMU
default 0x00000000 if PHYS_OFFSET_0
default 0x10000000 if PHYS_OFFSET_1
default 0x20000000 if PHYS_OFFSET_2
default 0x30000000 if PHYS_OFFSET_3
default 0x70000000 if PHYS_OFFSET_7
default 0x80000000 if PHYS_OFFSET_8
default 0xa0000000 if PHYS_OFFSET_A
default 0xc0000000 if PHYS_OFFSET_C
and then select one of the bool symbols from each platform.
Would that address your question?
Here's a question:
Can we just get rid of PHYS_OFFSET???
If it's only used at boot for XIP systems, we could:
A) pass it in via an unused register like atags and DT
or
B) just assume that atags or DT is in RAM, so round down to the nearest section and assume that is the start of your RAM
If it is needed after initial boot, then on first boot we save what was passed in from the boot loader for later use.
Hmm, you mean making phys_offset a runtime variable instead
of patching it at early boot time in the instructions?
I have no idea if that works, how much effort it would be,
or how much it would enlarge the kernel image size, but
you can definitely try.
Of course we must not break existing platforms using XIP_KERNEL
already, but the installed base among systems that are upgrading
to modern kernels is very small now, given how all modern platforms
don't support XIP_KERNEL today, or have no MMU to start with.
You're all barking up the wrong tree, because you don't understand
why it exists.
ARM_PATCH_PHYS_VIRT exists to support an init-time decided phys offset,
and it supports this by modifying each location that the phys offset
is used. It determines this by looking at the location that the early
init code is executing, and masking the PC with a value that has been
carefully crafted to fit 99% of the existing platforms.
One of the side effects of ARM_PATCH_PHYS_VIRT is that we hide the
translation from the compiler, so the compiler is unable to optimise
things like virt_to_phys(phys_to_virt(x)) to just 'x' (and yes, such
things do happen.)
PHYS_OFFSET exists to cater for the case where ARM_PATCH_PHYS_VIRT is
disabled, because either ARM_PATCH_PHYS_VIRT does not work for the
platform, or the platform has special requirements and/or requires
better performance. It switches back to the pre-ARM_PATCH_PHYS_VIRT
situation where the PHYS_OFFSET is a compile time constant.
Obviously, making PHYS_OFFSET a runtime variable is basically what
ARM_PATCH_PHYS_VIRT is doing. That does not help these cases though,
because the problem cases are not whether it's a runtime variable or
not, it's how to arrive at the value for it in the first place.
Using the DTB location on XIP platforms is a no-goer - the flattened
DTB information can be fixed, so on an XIP platform it makes sense
for this to also be in flash, not in RAM (the whole point of XIP is
to remove constant data from RAM after all, so why would you want to
copy the FDT to RAM?)
Passing it in a register to the kernel image is also not possible:
we've been out of spare registers for some time now for passing
additional information into the kernel. It wouldn't be a problem
had folk not had this "eww, I don't like ATAGs, lets get rid of them
and use DT instead" attitude: had we kept ATAGs, then we'd have an
in-memory format to pass this kind of information to the kernel.
That would solve soo many problems today it's untrue: stuff like
where a debugging UART is located and the type of it...
When DT was being proposed, my opinion was that's how it should've
been done, but I assumed that the DT folk knew better, and Grant was
very much of the opinion that ATAGs should be completely dropped (I
did touch on it with Grant.) I regret now not having a discussion
about it and pressing strongly for it.
--
RMK's Patch system: http://www.arm.linux.org.uk/developer/patches/
FTTC broadband for 0.8mile line: currently at 9.6Mbps down 400kbps up
according to speedtest.net.
From: Chris Brandt <Chris.Brandt@renesas.com> Date: 2016-02-19 17:19:34
On 19 Feb 2016, Russell King wrote:
Using the DTB location on XIP platforms is a no-goer - the flattened
DTB information can be fixed, so on an XIP platform it makes sense
for this to also be in flash, not in RAM (the whole point of XIP is
to remove constant data from RAM after all, so why would you want to
copy the FDT to RAM?)
I was under the impression that the DTB had a limited life span, and once booted, it could be clobbered. Hence, RAM would not really be wasted (post boot that is).
For an XIP system (with MMU), if you have your DTB in ROM someplace, you run the risk of getting it cut off after the MMU setup is done because it would fall someplace after the _exiprom marker.
Passing it in a register to the kernel image is also not possible:
we've been out of spare registers for some time now for passing
additional information into the kernel. It wouldn't be a problem
had folk not had this "eww, I don't like ATAGs, lets get rid of them
and use DT instead" attitude: had we kept ATAGs, then we'd have an
in-memory format to pass this kind of information to the kernel.
That would solve soo many problems today it's untrue: stuff like
where a debugging UART is located and the type of it...
Too bad we just couldn't have added an ATAG to point to a DTB. Sigh.
Chris
From: Nicolas Pitre <hidden> Date: 2016-02-19 17:57:48
On Fri, 19 Feb 2016, Russell King - ARM Linux wrote:
ARM_PATCH_PHYS_VIRT exists to support an init-time decided phys offset,
and it supports this by modifying each location that the phys offset
is used. It determines this by looking at the location that the early
init code is executing, and masking the PC with a value that has been
carefully crafted to fit 99% of the existing platforms.
One of the side effects of ARM_PATCH_PHYS_VIRT is that we hide the
translation from the compiler, so the compiler is unable to optimise
things like virt_to_phys(phys_to_virt(x)) to just 'x' (and yes, such
things do happen.)
PHYS_OFFSET exists to cater for the case where ARM_PATCH_PHYS_VIRT is
disabled, because either ARM_PATCH_PHYS_VIRT does not work for the
platform, or the platform has special requirements and/or requires
better performance. It switches back to the pre-ARM_PATCH_PHYS_VIRT
situation where the PHYS_OFFSET is a compile time constant.
Obviously, making PHYS_OFFSET a runtime variable is basically what
ARM_PATCH_PHYS_VIRT is doing. That does not help these cases though,
because the problem cases are not whether it's a runtime variable or
not, it's how to arrive at the value for it in the first place.
I think what Chris was suggesting is to have the same functionality as
PATCH_PHYS_VIRT i.e. determining phys offset at run time while being
XIP. In theory that could mean that the kernel binary becomes
independent of the physical location in flash where it executes from.
Arriving at the value for phys offset could be done based on sp instead
of pc. That's assuming the bootloader did not clobber sp before calling
into the kernel.
But this is rather fragile. And normally if you are interested in XIP,
you certainly have a highly customized kernel config already anyway. And
having a build-time constant PHYS_OFFSET is of course what performs
best.
Nicolas
From: Nicolas Pitre <hidden> Date: 2016-02-19 16:10:27
On Fri, 19 Feb 2016, Arnd Bergmann wrote:
On Thursday 18 February 2016 11:02:33 Nicolas Pitre wrote:
quoted
Acked-by: Nicolas Pitre <redacted>
Is there a way to provide a default for defaults?
We could have something like
config PHYS_OFFSET_0
bool
config PHYS_OFFSET_1
bool
config PHYS_OFFSET_2
bool
... (we need 8 of the 16 possible addresses)
config PHYS_OFFSET
hex "Physical address of main memory" if MMU
default DRAM_BASE if !MMU
default 0x00000000 if PHYS_OFFSET_0
default 0x10000000 if PHYS_OFFSET_1
default 0x20000000 if PHYS_OFFSET_2
default 0x30000000 if PHYS_OFFSET_3
default 0x70000000 if PHYS_OFFSET_7
default 0x80000000 if PHYS_OFFSET_8
default 0xa0000000 if PHYS_OFFSET_A
default 0xc0000000 if PHYS_OFFSET_C
and then select one of the bool symbols from each platform.
Would that address your question?
Yes, but the ugliness factor isn't worth it IMHO.
I was wondering if something like this was possible:
config PHYS_OFFSET
hex "Physical address of main memory" if MMU
default DRAM_BASE if !MMU
default 0x10000000 if FOO
default 0x20000000 if BAR
default 0x30000000 if BAZ
default 0x00000000
Nicolas
On Friday 19 February 2016 11:10:22 Nicolas Pitre wrote:
On Fri, 19 Feb 2016, Arnd Bergmann wrote:
quoted
On Thursday 18 February 2016 11:02:33 Nicolas Pitre wrote:
quoted
Acked-by: Nicolas Pitre <redacted>
Is there a way to provide a default for defaults?
...
quoted
and then select one of the bool symbols from each platform.
Would that address your question?
Yes, but the ugliness factor isn't worth it IMHO.
I was wondering if something like this was possible:
config PHYS_OFFSET
hex "Physical address of main memory" if MMU
default DRAM_BASE if !MMU
default 0x10000000 if FOO
default 0x20000000 if BAR
default 0x30000000 if BAZ
default 0x00000000
Ah, that was my previous approach, but Russell didn't like
how it makes it easier to fall back to an incorrect address
instead of forcing a build error when the address is not
configured.
Arnd
From: Nicolas Pitre <hidden> Date: 2016-02-19 17:31:07
On Fri, 19 Feb 2016, Arnd Bergmann wrote:
On Friday 19 February 2016 11:10:22 Nicolas Pitre wrote:
quoted
On Fri, 19 Feb 2016, Arnd Bergmann wrote:
quoted
On Thursday 18 February 2016 11:02:33 Nicolas Pitre wrote:
quoted
Acked-by: Nicolas Pitre <redacted>
Is there a way to provide a default for defaults?
...
quoted
quoted
and then select one of the bool symbols from each platform.
Would that address your question?
Yes, but the ugliness factor isn't worth it IMHO.
I was wondering if something like this was possible:
config PHYS_OFFSET
hex "Physical address of main memory" if MMU
default DRAM_BASE if !MMU
default 0x10000000 if FOO
default 0x20000000 if BAR
default 0x30000000 if BAZ
default 0x00000000
Ah, that was my previous approach, but Russell didn't like
how it makes it easier to fall back to an incorrect address
instead of forcing a build error when the address is not
configured.
Makes sense.
Yet, the only reason for a default here is to accommodate automatic
build tests like randconfig, right?
If so then this should be "fixed" by having the config system provide
built-in symbols that can be tested from kconfig files. This way you
could terminate the above list with:
default 0x00000000 if RANDCONFIG || ALLYESCONFIG
or the like.
Nicolas
From: Russell King - ARM Linux <hidden> Date: 2016-02-19 18:07:52
On Fri, Feb 19, 2016 at 12:31:02PM -0500, Nicolas Pitre wrote:
Yet, the only reason for a default here is to accommodate automatic
build tests like randconfig, right?
If so then this should be "fixed" by having the config system provide
built-in symbols that can be tested from kconfig files. This way you
could terminate the above list with:
default 0x00000000 if RANDCONFIG || ALLYESCONFIG
or the like.
I've suggested in the past that we have kconf read a seed file for
these configurations. kconf already has most of the required support
for this, we just need to teach it where to read it from. Maybe
something like this.
arch/arm/allrandom.config | 1 +
scripts/kconfig/conf.c | 61 ++++++++++++++++++++++++++++++++++++++---------
2 files changed, 51 insertions(+), 11 deletions(-)
@@ -489,10 +490,53 @@ static void conf_usage(const char *progname)printf(" --randconfig New config with random answer to all options\n");}+staticinttry_allconfig(inttry_arch,intinput_mode)+{+constchar*name=NULL;+intfd=-1,ret;++if(try_arch){+constchar*srctree=getenv("srctree");+constchar*arch=getenv("ARCH");++fd=open(".",O_DIRECTORY);+if(fd==-1){+perror("opening .");+return-1;+}+if(chdir(srctree)==-1||+chdir("arch")==-1||+chdir(arch)==-1){+perror("chdir");+return-1;+}+}++switch(input_mode){+caseallnoconfig:name="allno.config";break;+caseallyesconfig:name="allyes.config";break;+caseallmodconfig:name="allmod.config";break;+casealldefconfig:name="alldef.config";break;+caserandconfig:name="allrandom.config";break;+default:break;+}++ret=name?conf_read_simple(name,S_DEF_USER):1;+if(ret)+ret=conf_read_simple("all.config",S_DEF_USER);++if(fd>=0){+fchdir(fd);+close(fd);+}++returnret;+}+intmain(intac,char**av){constchar*progname=av[0];-intopt;+intopt,ret;constchar*name,*defconfig_file=NULL/* gcc uninit */;structstattmpstat;
@@ -601,6 +645,9 @@ int main(int ac, char **av)caseallmodconfig:casealldefconfig:caserandconfig:+ret=try_allconfig(1,input_mode);+if(ret<0)+exit(1);name=getenv("KCONFIG_ALLCONFIG");if(!name)break;
@@ -613,16 +660,8 @@ int main(int ac, char **av)}break;}-switch(input_mode){-caseallnoconfig:name="allno.config";break;-caseallyesconfig:name="allyes.config";break;-caseallmodconfig:name="allmod.config";break;-casealldefconfig:name="alldef.config";break;-caserandconfig:name="allrandom.config";break;-default:break;-}-if(conf_read_simple(name,S_DEF_USER)&&-conf_read_simple("all.config",S_DEF_USER)){+ret=try_allconfig(0,input_mode);+if(ret){fprintf(stderr,_("*** KCONFIG_ALLCONFIG set, but no \"%s\" or \"all.config\" file found\n"),name);
--
RMK's Patch system: http://www.arm.linux.org.uk/developer/patches/
FTTC broadband for 0.8mile line: currently@9.6Mbps down 400kbps up
according to speedtest.net.
On Friday 19 February 2016 18:07:25 Russell King - ARM Linux wrote:
On Fri, Feb 19, 2016 at 12:31:02PM -0500, Nicolas Pitre wrote:
quoted
Yet, the only reason for a default here is to accommodate automatic
build tests like randconfig, right?
If so then this should be "fixed" by having the config system provide
built-in symbols that can be tested from kconfig files. This way you
could terminate the above list with:
default 0x00000000 if RANDCONFIG || ALLYESCONFIG
or the like.
I've suggested in the past that we have kconf read a seed file for
these configurations. kconf already has most of the required support
for this, we just need to teach it where to read it from. Maybe
something like this.
arch/arm/allrandom.config | 1 +
scripts/kconfig/conf.c | 61 ++++++++++++++++++++++++++++++++++++++---------
2 files changed, 51 insertions(+), 11 deletions(-)
Interesting, I had never noticed that we had the infrastructure to have
separate presets for allno/allmod/allyes/...config by file name,
aside from the ${KCONFIG_ALLCONFIG}, I think your extension to make
it architecture specific is a very good idea, and it can solve a
couple of other problems as well, such as new toolchains barfing
on -march=armv3 and OABI support.
There is a bit of overlap with the Kconfig fragments, which are
defined in a similar way:
With the recently added Kconfig fragments support, you could do
(almost) the same thing by specifying
make randconfig allrandom.config
"almost", because
- The fragments use a search path including kernel/config/*.config
and arch/*/configs/*.config, rather than arch/*/*.config
I would prefer using the search path we have for the fragments now.
- The current implementation does not start out with the symbols
from the fragment but instead applies the fragments one by one
after the initial config, so the example above is the same as
make randconfig
make allrandom.config
which does not have the same results. For this, I think starting
with the fragment makes more sense, but that unfortunately requires
changing the command line interface if we want to generalize it.
Arnd
The merge_fdt_bootargs() function by definition consumes more than 1024
bytes of stack because it has a 1024 byte command line on the stack,
meaning that we always get a warning when building this file:
arch/arm/boot/compressed/atags_to_fdt.c: In function 'merge_fdt_bootargs':
arch/arm/boot/compressed/atags_to_fdt.c:98:1: warning: the frame size of 1032 bytes is larger than 1024 bytes [-Wframe-larger-than=]
However, as this is the decompressor and we know that it has a very shallow
call chain, and we do not actually risk overflowing the kernel stack
at runtime here.
This just shuts up the warning by disabling the warning flag for this
file.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
arch/arm/boot/compressed/Makefile | 2 ++
1 file changed, 2 insertions(+)
From: Nicolas Pitre <hidden> Date: 2016-02-18 16:13:57
On Thu, 18 Feb 2016, Arnd Bergmann wrote:
The merge_fdt_bootargs() function by definition consumes more than 1024
bytes of stack because it has a 1024 byte command line on the stack,
meaning that we always get a warning when building this file:
arch/arm/boot/compressed/atags_to_fdt.c: In function 'merge_fdt_bootargs':
arch/arm/boot/compressed/atags_to_fdt.c:98:1: warning: the frame size of 1032 bytes is larger than 1024 bytes [-Wframe-larger-than=]
However, as this is the decompressor and we know that it has a very shallow
call chain, and we do not actually risk overflowing the kernel stack
at runtime here.
This just shuts up the warning by disabling the warning flag for this
file.
The merge_fdt_bootargs() function by definition consumes more than 1024
bytes of stack because it has a 1024 byte command line on the stack,
meaning that we always get a warning when building this file:
arch/arm/boot/compressed/atags_to_fdt.c: In function 'merge_fdt_bootargs':
arch/arm/boot/compressed/atags_to_fdt.c:98:1: warning: the frame size of 1032 bytes is larger than 1024 bytes [-Wframe-larger-than=]
However, as this is the decompressor and we know that it has a very shallow
call chain, and we do not actually risk overflowing the kernel stack
at runtime here.
This just shuts up the warning by slightly increasing the limit for this
file.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
On Thursday 18 February 2016 11:13:52 Nicolas Pitre wrote:
From: Nicolas Pitre <hidden> Date: 2016-02-18 17:14:12
On Thu, 18 Feb 2016, Arnd Bergmann wrote:
The merge_fdt_bootargs() function by definition consumes more than 1024
bytes of stack because it has a 1024 byte command line on the stack,
meaning that we always get a warning when building this file:
arch/arm/boot/compressed/atags_to_fdt.c: In function 'merge_fdt_bootargs':
arch/arm/boot/compressed/atags_to_fdt.c:98:1: warning: the frame size of 1032 bytes is larger than 1024 bytes [-Wframe-larger-than=]
However, as this is the decompressor and we know that it has a very shallow
call chain, and we do not actually risk overflowing the kernel stack
at runtime here.
This just shuts up the warning by slightly increasing the limit for this
file.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Nicolas Pitre <redacted>
quoted hunk
---
On Thursday 18 February 2016 11:13:52 Nicolas Pitre wrote:
On Thursday 18 February 2016 17:26:56 Arnd Bergmann wrote:
On Thursday 18 February 2016 11:13:52 Nicolas Pitre wrote:
quoted
What about setting the warning to 2048 instead?
Sure, actually 1280 is more than enough I think.
It turns out that doesn't fix the problem though, as the new
argument gets prepended and the existing flag overrides it.
I have modified the patch now to do both:
CFLAGS_REMOVE_atags_to_fdt.o += -Wframe-larger-than=${CONFIG_FRAME_WARN}
CFLAGS_atags_to_fdt.o += -Wframe-larger-than=1280
Arnd
When CONFIG_MMU is disabled, the access_ok() and __range_ok()
macros always return success, and there is a cast to void
to ensure the compiler does not warn about an unused address
variable. However, at least one driver has a variable for
the size argument as well and does warn about that one:
drivers/vhost/vhost.c: In function 'vq_access_ok':
drivers/vhost/vhost.c:633:9: warning: unused variable 's' [-Wunused-variable]
This changes the macro to also ignore the size argument
explicitly to shut up that warning.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
arch/arm/include/asm/uaccess.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
From: Nicolas Pitre <hidden> Date: 2016-02-18 16:15:36
On Thu, 18 Feb 2016, Arnd Bergmann wrote:
When CONFIG_MMU is disabled, the access_ok() and __range_ok()
macros always return success, and there is a cast to void
to ensure the compiler does not warn about an unused address
variable. However, at least one driver has a variable for
the size argument as well and does warn about that one:
drivers/vhost/vhost.c: In function 'vq_access_ok':
drivers/vhost/vhost.c:633:9: warning: unused variable 's' [-Wunused-variable]
This changes the macro to also ignore the size argument
explicitly to shut up that warning.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The NO_DMA macro is only used on the RiscPC ecard bus, and conflicts
with a couple of driver specific macros with the same name:
drivers/scsi/eata.c:571:0: warning: "NO_DMA" redefined
#define NO_DMA 0xff
In file included from ../drivers/scsi/eata.c:495:0:
arch/arm/include/asm/dma.h:140:0: note: this is the location of the previous definition
#define NO_DMA 255
This moves the definition out of the asm/dma.h header that is used
by all ISA DMA API users and into the ecard header.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
arch/arm/include/asm/dma.h | 4 ----
arch/arm/include/asm/ecard.h | 4 ++++
2 files changed, 4 insertions(+), 4 deletions(-)
From: Nicolas Pitre <hidden> Date: 2016-02-18 16:17:40
On Thu, 18 Feb 2016, Arnd Bergmann wrote:
The NO_DMA macro is only used on the RiscPC ecard bus, and conflicts
with a couple of driver specific macros with the same name:
drivers/scsi/eata.c:571:0: warning: "NO_DMA" redefined
#define NO_DMA 0xff
In file included from ../drivers/scsi/eata.c:495:0:
arch/arm/include/asm/dma.h:140:0: note: this is the location of the previous definition
#define NO_DMA 255
This moves the definition out of the asm/dma.h header that is used
by all ISA DMA API users and into the ecard header.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The gcc-4.9 optimization goes wrong while building target_core_iblock.c
for ARMv3 and leaves a bogus reference to __aeabi_uldivmod in the
output:
ERROR: "__aeabi_uldivmod" [drivers/target/target_core_iblock.ko] undefined!
I could not find anyone who is interested in fixing it in gcc,
so as a workaround this disables the do_div magic, just like
we do for old compilers and for OABI.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
arch/arm/include/asm/div64.h | 8 ++++++++
1 file changed, 8 insertions(+)
From: Nicolas Pitre <hidden> Date: 2016-02-18 17:21:12
On Thu, 18 Feb 2016, Arnd Bergmann wrote:
The gcc-4.9 optimization goes wrong while building target_core_iblock.c
for ARMv3 and leaves a bogus reference to __aeabi_uldivmod in the
output:
ERROR: "__aeabi_uldivmod" [drivers/target/target_core_iblock.ko] undefined!
I could not find anyone who is interested in fixing it in gcc,
so as a workaround this disables the do_div magic, just like
we do for old compilers and for OABI.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
I suppose this is good enough for the purpose of keeping RiscPC
buildable. Whether or not it is still used is another question. If it
is then its user probably expects it to be slow already.
Acked-by: Nicolas Pitre <redacted>
Still unfortunate having to use a big hammer such as -march=armv3 just
to avoid halfword memory accesses.
On Thursday 18 February 2016 12:20:51 Nicolas Pitre wrote:
On Thu, 18 Feb 2016, Arnd Bergmann wrote:
quoted
The gcc-4.9 optimization goes wrong while building target_core_iblock.c
for ARMv3 and leaves a bogus reference to __aeabi_uldivmod in the
output:
ERROR: "__aeabi_uldivmod" [drivers/target/target_core_iblock.ko] undefined!
I could not find anyone who is interested in fixing it in gcc,
so as a workaround this disables the do_div magic, just like
we do for old compilers and for OABI.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
I suppose this is good enough for the purpose of keeping RiscPC
buildable. Whether or not it is still used is another question. If it
is then its user probably expects it to be slow already.
Acked-by: Nicolas Pitre <redacted>
Thanks.
Still unfortunate having to use a big hammer such as -march=armv3 just
to avoid halfword memory accesses.
I brought this up with the gcc developers before. They would really want
to deprecated ARMv3 support, but nobody seems interested in implementing
halfword memory access as a replacement.
FWIW, I am currently still allowing ARMv3 in randconfig builds, but
have run into 12 internal compiler errors with that, on gcc-4.9 or higher.
It's probably all the same bug, but I don't see this getting fixed
unless the RiscOS people update to a newer toolchain and run into the
same problem.
The patch below disables optimization so I am able to build this, but
I see no way to fix this upstream.
Arnd
arch/arm/boot/compressed/Makefile | 3 +++
drivers/block/aoe/Makefile | 3 +++
drivers/block/paride/Makefile | 3 +++
drivers/net/Makefile | 7 +++++++
drivers/net/ethernet/apm/xgene/Makefile | 4 ++++
drivers/staging/lustre/lustre/llite/Makefile | 4 ++++
fs/fat/Makefile | 4 ++++
kernel/Makefile | 3 +++
lib/zlib_inflate/Makefile | 4 ++++
net/decnet/Makefile | 4 ++++
net/irda/Makefile | 4 ++++
11 files changed, 43 insertions(+)
From: Nicolas Pitre <hidden> Date: 2016-02-19 18:44:40
On Fri, 19 Feb 2016, Arnd Bergmann wrote:
On Thursday 18 February 2016 12:20:51 Nicolas Pitre wrote:
quoted
On Thu, 18 Feb 2016, Arnd Bergmann wrote:
quoted
The gcc-4.9 optimization goes wrong while building target_core_iblock.c
for ARMv3 and leaves a bogus reference to __aeabi_uldivmod in the
output:
ERROR: "__aeabi_uldivmod" [drivers/target/target_core_iblock.ko] undefined!
I could not find anyone who is interested in fixing it in gcc,
so as a workaround this disables the do_div magic, just like
we do for old compilers and for OABI.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
I suppose this is good enough for the purpose of keeping RiscPC
buildable. Whether or not it is still used is another question. If it
is then its user probably expects it to be slow already.
Acked-by: Nicolas Pitre <redacted>
Thanks.
quoted
Still unfortunate having to use a big hammer such as -march=armv3 just
to avoid halfword memory accesses.
I brought this up with the gcc developers before. They would really want
to deprecated ARMv3 support, but nobody seems interested in implementing
halfword memory access as a replacement.
Actually, the only thing needed as far as Linux on RiscPC is concerned
is a compiler switch that prevents the use of STRH, LDRH and LDRSH
instructions when -march=armv4 is used.
FWIW, I am currently still allowing ARMv3 in randconfig builds, but
have run into 12 internal compiler errors with that, on gcc-4.9 or higher.
It's probably all the same bug, but I don't see this getting fixed
unless the RiscOS people update to a newer toolchain and run into the
same problem.
Hmmm I suppose the ability to use halfword accesses is assumed by new
optimization patterns and that's why gcc fails when they're not
available.
The patch below disables optimization so I am able to build this, but
I see no way to fix this upstream.
That begs the question again: is anyone using mainline Linux on RiscPC?
If I remember correctly, the ability to boot Linux on an i386 was
removed a while ago and nobody complained.
Nicolas
ARMv3 did not have 16-bit load/store or 32-bit multiply instructions,
so building the kprobe test code fails with lots of warnings about
these:
/tmp/ccI4SKHx.s:19585: Error: selected processor does not support ARM mode `umull r0,r1,r2,r3'
/tmp/ccI4SKHx.s:19617: Error: selected processor does not support ARM mode `umullls r7,r8,r9,r10'
/tmp/ccI4SKHx.s:19645: Error: selected processor does not support ARM mode `umull lr,r12,r11,r13'
/tmp/ccI4SKHx.s:19727: Error: selected processor does not support ARM mode `umulls r0,r1,r2,r3'
...
/tmp/ccI4SKHx.s:21273: Error: selected processor does not support ARM mode `strh r0,[r1,-r2]'
/tmp/ccI4SKHx.s:21309: Error: selected processor does not support ARM mode `streqh r14,[r11,r12]'
/tmp/ccI4SKHx.s:21333: Error: selected processor does not support ARM mode `streqh r14,[r13,r12]'
This puts all the affected instructions inside an #ifdef section,
like we do for the other architecture levels.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
arch/arm/probes/kprobes/test-arm.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
From: Jon Medhurst (Tixy) <hidden> Date: 2016-02-18 14:21:27
On Thu, 2016-02-18 at 15:02 +0100, Arnd Bergmann wrote:
ARMv3 did not have 16-bit load/store or 32-bit multiply instructions,
so building the kprobe test code fails with lots of warnings about
these:
/tmp/ccI4SKHx.s:19585: Error: selected processor does not support ARM mode `umull r0,r1,r2,r3'
/tmp/ccI4SKHx.s:19617: Error: selected processor does not support ARM mode `umullls r7,r8,r9,r10'
/tmp/ccI4SKHx.s:19645: Error: selected processor does not support ARM mode `umull lr,r12,r11,r13'
/tmp/ccI4SKHx.s:19727: Error: selected processor does not support ARM mode `umulls r0,r1,r2,r3'
...
/tmp/ccI4SKHx.s:21273: Error: selected processor does not support ARM mode `strh r0,[r1,-r2]'
/tmp/ccI4SKHx.s:21309: Error: selected processor does not support ARM mode `streqh r14,[r11,r12]'
/tmp/ccI4SKHx.s:21333: Error: selected processor does not support ARM mode `streqh r14,[r13,r12]'
This puts all the affected instructions inside an #ifdef section,
like we do for the other architecture levels.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
From: Nicolas Pitre <hidden> Date: 2016-02-18 16:21:50
On Thu, 18 Feb 2016, Arnd Bergmann wrote:
ARMv3 did not have 16-bit load/store or 32-bit multiply instructions,
so building the kprobe test code fails with lots of warnings about
these:
/tmp/ccI4SKHx.s:19585: Error: selected processor does not support ARM mode `umull r0,r1,r2,r3'
/tmp/ccI4SKHx.s:19617: Error: selected processor does not support ARM mode `umullls r7,r8,r9,r10'
/tmp/ccI4SKHx.s:19645: Error: selected processor does not support ARM mode `umull lr,r12,r11,r13'
/tmp/ccI4SKHx.s:19727: Error: selected processor does not support ARM mode `umulls r0,r1,r2,r3'
...
/tmp/ccI4SKHx.s:21273: Error: selected processor does not support ARM mode `strh r0,[r1,-r2]'
/tmp/ccI4SKHx.s:21309: Error: selected processor does not support ARM mode `streqh r14,[r11,r12]'
/tmp/ccI4SKHx.s:21333: Error: selected processor does not support ARM mode `streqh r14,[r13,r12]'
This puts all the affected instructions inside an #ifdef section,
like we do for the other architecture levels.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>