Thread (32 messages) 32 messages, 5 authors, 2013-11-08

[PATCH 01/11] devicetree: bindings: Document cpu enable-method for ARM CPUs

From: Tomasz Figa <hidden>
Date: 2013-11-08 09:12:34
Also in: linux-arm-msm, linux-devicetree, lkml

On Friday 01 of November 2013 15:08:49 Stephen Boyd wrote:
quoted hunk ↗ jump to hunk
From: Rohit Vaswani <redacted>

According to the ePAPR CPUs should have an enable method. On ARM
the enable-method property has not been used so far, so document
this property as an optional property and add the spin-table
method as one value

Cc: <redacted>
Signed-off-by: Rohit Vaswani <redacted>
[sboyd: Split off into separate patch]
Signed-off-by: Stephen Boyd <redacted>
---
 Documentation/devicetree/bindings/arm/cpus.txt | 8 ++++++++
 1 file changed, 8 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/cpus.txt
b/Documentation/devicetree/bindings/arm/cpus.txt index f32494d..37258f9
100644
--- a/Documentation/devicetree/bindings/arm/cpus.txt
+++ b/Documentation/devicetree/bindings/arm/cpus.txt
@@ -45,6 +45,14 @@ For the ARM architecture every CPU node must contain
the following properties: "marvell,xsc3"
 		"marvell,xscale"

+And the following optional properties:
+
+- enable-method: Specifies the method used to enable or take the
secondary cores +		 out of reset. This allows different reset 
sequence
for
+		 different types of cpus.
+		 This should be one of:
+		 "spin-table"
What about saying a word or two (other than property value) about each 
method?

Best regards,
Tomasz
Keyboard shortcuts
hback out one level
jnext message in thread
kprevious message in thread
ldrill in
Escclose help / fold thread tree
?toggle this help