[PATCH net-next] macb: Keep driver's speed/duplex in sync with actual NCFGR

STALE5020d

2 messages, 2 authors, 2012-11-03 · open the first message on its own page

[PATCH net-next] macb: Keep driver's speed/duplex in sync with actual NCFGR

From: Vitalii Demianets <hidden>
Date: 2012-11-02 17:09:24

When underlying phy driver restores its state very fast after being brought 
down and up so that macb driver function macb_handle_link_change() was never 
called with link state "down", driver's internal representation of phy speed 
and duplex (bp->speed and bp->duplex) didn't change. So, macb driver sees no 
reason to perform actual write to the NCFGR register, although the speed and 
duplex settings in that register were reset when interface was brought down 
and up. In that case actual phy speed and duplex differ from NCFGR settings.
The patch fixes that by keeping internal driver representation of speed and 
duplex in sync with actual content of NCFGR.

Signed-off-by: Vitalii Demianets <redacted>

---
 drivers/net/ethernet/cadence/macb.c |    2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/drivers/net/ethernet/cadence/macb.c 
b/drivers/net/ethernet/cadence/macb.c
index c374875..13c3c33 100644
--- a/drivers/net/ethernet/cadence/macb.c
+++ b/drivers/net/ethernet/cadence/macb.c
@@ -1031,6 +1031,8 @@ static void macb_init_hw(struct macb *bp)
 		config |= MACB_BIT(NBC);	/* No BroadCast */
 	config |= macb_dbw(bp);
 	macb_writel(bp, NCFGR, config);
+	bp->speed = SPEED_10;
+	bp->duplex = DUPLEX_HALF;
 
 	macb_configure_dma(bp);
 
-- 
1.7.8.6

[PATCH net-next] macb: Keep driver's speed/duplex in sync with actual NCFGR

From: davem@davemloft.net (David Miller)
Date: 2012-11-03 19:38:13

From: Vitalii Demianets <redacted>
Date: Fri, 2 Nov 2012 19:09:24 +0200
When underlying phy driver restores its state very fast after being brought 
down and up so that macb driver function macb_handle_link_change() was never 
called with link state "down", driver's internal representation of phy speed 
and duplex (bp->speed and bp->duplex) didn't change. So, macb driver sees no 
reason to perform actual write to the NCFGR register, although the speed and 
duplex settings in that register were reset when interface was brought down 
and up. In that case actual phy speed and duplex differ from NCFGR settings.
The patch fixes that by keeping internal driver representation of speed and 
duplex in sync with actual content of NCFGR.

Signed-off-by: Vitalii Demianets <redacted>
Applied.
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