[PATCH] Add device tree file for the armadeus apf27

Signed-off-by: Philippe Reynes <redacted>
Signed-off-by: Eric Jarrige <redacted>
---
 arch/arm/boot/dts/imx27-apf27.dts |   96 +++++++++++++++++++++++++++++++++++++
 1 files changed, 96 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/boot/dts/imx27-apf27.dts

diff --git a/arch/arm/boot/dts/imx27-apf27.dts b/arch/arm/boot/dts/imx27-apf27.dts
new file mode 100644
index 0000000..b7d11e0
--- /dev/null
+++ b/arch/arm/boot/dts/imx27-apf27.dts

@@ -0,0 +1,96 @@
+/*
+ * Copyright 2012 Philippe Reynes <tremyfr@yahoo.fr>
+ * Copyright 2012 Armadeus Systems <support@armadeus.com>
+ *
+ * Based on code which is: Copyright 2012 Sascha Hauer, Pengutronix
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+/include/ "imx27.dtsi"
+
+/ {
+	model = "Armadeus apf27";
+	compatible = "armadeus,imx27-apf27", "fsl,imx27";
+
+	memory {
+		reg = <0xa0000000 0x04000000>;
+	};
+
+	clocks {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		osc26m {
+			compatible = "fsl,imx-osc26m", "fixed-clock";
+			clock-frequency = <33554432>;
+		};
+	};
+
+	soc {
+		aipi at 10000000 {
+			wdog at 10002000 {
+				status = "okay";
+			};
+
+			serial at 1000a000 {
+				status = "okay";
+			};
+
+			ethernet at 1002b000 {
+				status = "okay";
+			};
+
+		};
+
+		nand at d8000000 {
+			status = "okay";
+			nand-bus-width = <16>;
+			nand-ecc-mode = "hw";
+			nand-on-flash-bbt;
+
+			partition at 0 {
+				label = "u-boot";
+				reg = <0x0 0x100000>;
+			};
+
+			partition at 100000 {
+				label = "env";
+				reg = <0x100000 0x80000>;
+			};
+
+			partition at 180000 {
+				label = "env2";
+				reg = <0x180000 0x80000>;
+			};
+
+			partition at 200000 {
+				label = "firmware";
+				reg = <0x200000 0x80000>;
+			};
+
+			partition at 280000 {
+				label = "dtb";
+				reg = <0x280000 0x80000>;
+			};
+
+			partition at 300000 {
+				label = "kernel";
+				reg = <0x300000 0x500000>;
+			};
+
+			partition at 800000 {
+				label = "rootfs";
+				reg = <0x800000 0xf800000>;
+			};
+		};
+
+	};
+
+};

-- 
1.7.4.4

On Fri, Oct 26, 2012 at 06:29:40PM +0200, Philippe Reynes wrote:

Is this really correct? The Datasheet specificies 26MHz, some boards
have 27Mhz, but 33?

+		};
+	};
+
+	soc {
+		aipi at 10000000 {
+			wdog at 10002000 {
+				status = "okay";
+			};

This node is not necessary. The watchdog is enabled already in the dtsi
file.

Sascha


-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

Hi Sascha,

quoted

+??? ??? osc26m {

quoted

+??? ??? ??? compatible = "fsl,imx-osc26m", "fixed-clock";
+??? ??? ??? clock-frequency = <33554432>;

Is this really correct? The Datasheet specificies 26MHz, some boards
have 27Mhz, but 33?

The clock value on this board is? 32.768kHz, so 32768 * 1024.
I've tried others value, all others produce weird behaviour on the serial.

quoted

+??? soc {
+??? ??? aipi at 10000000 {
+??? ??? ??? wdog at 10002000 {
+??? ??? ??? ??? status = "okay";
+??? ??? ??? };

This node is not necessary. The watchdog is enabled already in the dtsi
file.

Yes, you're right, I'll send a v2 of this patch without the watchdog.

Regards,
Philippe
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On Tue, Oct 30, 2012 at 07:55:44PM +0000, Philippe Reynes wrote:

Hi Sascha,

quoted

quoted

+??? ??? osc26m {

quoted

quoted

+??? ??? ??? compatible = "fsl,imx-osc26m", "fixed-clock";
+??? ??? ??? clock-frequency = <33554432>;

quoted

Is this really correct? The Datasheet specificies 26MHz, some boards
have 27Mhz, but 33?

The clock value on this board is? 32.768kHz, so 32768 * 1024.
I've tried others value, all others produce weird behaviour on the serial.

Ok, so your board runs with the 32.768KHz clock input. I didn't know
there are boards that use this as the reference clock. It seems this
is not handled in the current clk code. Could you test the patch I just
sent to the mailing list (Cced you) and provide a Tested-by tag if it
works? The clock frequency provided in the device tree shouldn't make
a difference then anymore. You should specify it to 0 if you have
nothing connected there.

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |