5 messages, 2 authors, 2012-07-18 · open the first message on its own page
From: mkl@pengutronix.de (Marc Kleine-Budde)
Date: 2012-07-18 09:42:41
Hello, this series adds flexcan support to mx53 clock and device tree. In order to work, an updated flexcan driver is needed, which is currently under review [1]. This series applies to v3.5-rc7. regards, Marc [1] http://www.spinics.net/lists/arm-kernel/msg185139.html
From: mkl@pengutronix.de (Marc Kleine-Budde)
Date: 2012-07-18 09:42:42
From: Sascha Hauer <s.hauer@pengutronix.de> On the imx53, the flexcan core has two clocks, the ipg and the per clock. This patch adds these clocks for both flexcans on the imx53. An updated flexcan driver, taking advantage of these clocks, is currently in the review process. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Steffen Trumtrar <redacted> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de> --- arch/arm/mach-imx/clk-imx51-imx53.c | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-imx/clk-imx51-imx53.c b/arch/arm/mach-imx/clk-imx51-imx53.c
index a2200c7..37eb420 100644
--- a/arch/arm/mach-imx/clk-imx51-imx53.c
+++ b/arch/arm/mach-imx/clk-imx51-imx53.c@@ -49,6 +49,7 @@ static const char *mx53_tve_ext_sel[] = { "pll4_sw", "ckih1", }; static const char *tve_sel[] = { "tve_pred", "tve_ext_sel", }; static const char *ipu_sel[] = { "axi_a", "axi_b", "emi_slow_gate", "ahb", }; static const char *vpu_sel[] = { "axi_a", "axi_b", "emi_slow_gate", "ahb", }; +static const char *mx53_can_sel[] = { "ipg", "ckih1", "ckih2", "lp_apm", }; enum imx5_clks { dummy, ckil, osc, ckih1, ckih2, ahb, ipg, axi_a, axi_b, uart_pred,
@@ -81,6 +82,7 @@ enum imx5_clks { ssi1_root_podf, ssi2_root_pred, ssi2_root_podf, ssi_ext1_pred, ssi_ext1_podf, ssi_ext2_pred, ssi_ext2_podf, ssi1_root_gate, ssi2_root_gate, ssi3_root_gate, ssi_ext1_gate, ssi_ext2_gate, + can_sel, can1_serial_gate, can1_ipg_gate, clk_max };
@@ -411,8 +413,12 @@ int __init mx53_clocks_init(unsigned long rate_ckil, unsigned long rate_osc, clk[esdhc4_per_gate] = imx_clk_gate2("esdhc4_per_gate", "esdhc_d_sel", MXC_CCM_CCGR3, 14); clk[usb_phy1_gate] = imx_clk_gate2("usb_phy1_gate", "usb_phy_sel", MXC_CCM_CCGR4, 10); clk[usb_phy2_gate] = imx_clk_gate2("usb_phy2_gate", "usb_phy_sel", MXC_CCM_CCGR4, 12); - clk[can2_serial_gate] = imx_clk_gate2("can2_serial_gate", "ipg", MXC_CCM_CCGR4, 6); - clk[can2_ipg_gate] = imx_clk_gate2("can2_ipg_gate", "ipg", MXC_CCM_CCGR4, 8); + clk[can_sel] = imx_clk_mux("can_sel", MXC_CCM_CSCMR2, 6, 2, + mx53_can_sel, ARRAY_SIZE(mx53_can_sel)); + clk[can1_serial_gate] = imx_clk_gate2("can1_serial_gate", "can_sel", MXC_CCM_CCGR6, 22); + clk[can1_ipg_gate] = imx_clk_gate2("can1_ipg_gate", "ipg", MXC_CCM_CCGR6, 20); + clk[can2_serial_gate] = imx_clk_gate2("can2_serial_gate", "can_sel", MXC_CCM_CCGR4, 8); + clk[can2_ipg_gate] = imx_clk_gate2("can2_ipg_gate", "ipg", MXC_CCM_CCGR4, 6); clk[i2c3_gate] = imx_clk_gate2("i2c3_gate", "per_root", MXC_CCM_CCGR1, 22); for (i = 0; i < ARRAY_SIZE(clk); i++)
@@ -445,6 +451,10 @@ int __init mx53_clocks_init(unsigned long rate_ckil, unsigned long rate_osc, clk_register_clkdev(clk[ssi1_ipg_gate], NULL, "63fcc000.ssi"); clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "50014000.ssi"); clk_register_clkdev(clk[ssi3_ipg_gate], NULL, "63fd0000.ssi"); + clk_register_clkdev(clk[can1_ipg_gate], "ipg", "53fc8000.can"); + clk_register_clkdev(clk[can1_serial_gate], "per", "53fc8000.can"); + clk_register_clkdev(clk[can2_ipg_gate], "ipg", "53fcc000.can"); + clk_register_clkdev(clk[can2_serial_gate], "per", "53fcc000.can"); /* set SDHC root clock to 200MHZ*/ clk_set_rate(clk[esdhc_a_podf], 200000000);
--
1.7.10.4
From: mkl@pengutronix.de (Marc Kleine-Budde)
Date: 2012-07-18 09:42:43
From: Steffen Trumtrar <redacted> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Shawn Guo <redacted> Signed-off-by: Steffen Trumtrar <redacted> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de> --- arch/arm/boot/dts/imx53.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+)
diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi
index e3e8694..5ae0dbd 100644
--- a/arch/arm/boot/dts/imx53.dtsi
+++ b/arch/arm/boot/dts/imx53.dtsi@@ -196,6 +196,20 @@ status = "disabled"; }; + can1: can at 53fc8000 { + compatible = "fsl,imx53-flexcan", "fsl,p1010-flexcan"; + reg = <0x53fc8000 0x4000>; + interrupts = <82>; + status = "disabled"; + }; + + can2: can at 53fcc000 { + compatible = "fsl,imx53-flexcan", "fsl,p1010-flexcan"; + reg = <0x53fcc000 0x4000>; + interrupts = <83>; + status = "disabled"; + }; + gpio5: gpio at 53fdc000 { compatible = "fsl,imx53-gpio", "fsl,imx31-gpio"; reg = <0x53fdc000 0x4000>;
--
1.7.10.4
From: mkl@pengutronix.de (Marc Kleine-Budde)
Date: 2012-07-18 14:38:52
On 07/18/2012 04:53 PM, Shawn Guo wrote:
On Wed, Jul 18, 2012 at 11:42:43AM +0200, Marc Kleine-Budde wrote:quoted
From: Steffen Trumtrar <redacted> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Shawn Guo <redacted> Signed-off-by: Steffen Trumtrar <redacted> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>I have sent all my 3.6 material to arm-soc, so queued it for 3.7.
Fine with me. Thanks, Marc -- Pengutronix e.K. | Marc Kleine-Budde | Industrial Linux Solutions | Phone: +49-231-2826-924 | Vertretung West/Dortmund | Fax: +49-5121-206917-5555 | Amtsgericht Hildesheim, HRA 2686 | http://www.pengutronix.de | -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 262 bytes Desc: OpenPGP digital signature URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20120718/7e36fbca/attachment.sig>
From: Shawn Guo <hidden>
Date: 2012-07-18 14:53:22
On Wed, Jul 18, 2012 at 11:42:43AM +0200, Marc Kleine-Budde wrote:
From: Steffen Trumtrar <redacted> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Shawn Guo <redacted> Signed-off-by: Steffen Trumtrar <redacted> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
I have sent all my 3.6 material to arm-soc, so queued it for 3.7. Shawn