[PATCH v3 0/2] Add pinctrl support to AM33XX family of devices

Adds pinctrl support to AM33XX family of devices. These patches were
tested on AM335x-Bone and AM335x-EVM 

Changes from v2:
	- user led pinmux comments updated according to Tony's
	  comment.

Changes from v1:
	- Rebased the patches based on latest pinctrl-single driver

AnilKumar Ch (2):
  arm/dts: Add AM33XX basic pinctrl support
  arm/dts: Configure pinmuxs for user leds control on Bone

 arch/arm/boot/dts/am335x-bone.dts |   15 +++++++++++++++
 arch/arm/boot/dts/am33xx.dtsi     |    9 +++++++++
 2 files changed, 24 insertions(+)

-- 
1.7.9.5

Adds basic pinctrl support for AM33XX family of devices. This patch
is based on the pinctrl-simple driver submitted by Tony Lindgren's
here: http://lwn.net/Articles/496075/

Signed-off-by: AnilKumar Ch <redacted>
---
 arch/arm/boot/dts/am33xx.dtsi |    9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index 59509c4..9b974dc 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi

@@ -40,6 +40,15 @@
 		};
 	};
 
+	am3358_pinmux: pinmux at 44E10800 {
+		compatible = "pinctrl-single";
+		reg = <0x44E10800 0x0338>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		pinctrl-single,register-width = <32>;
+		pinctrl-single,function-mask = <0x7F>;
+	};
+
 	/*
 	 * XXX: Use a flat representation of the AM33XX interconnect.
 	 * The real AM33XX interconnect network is quite complex.Since

-- 
1.7.9.5

Adds GPIO pinctrl nodes to am3358_pinmux master node to control
user leds (USR0, USR1, USR2 and USR3) present on BeagleBone.

Signed-off-by: AnilKumar Ch <redacted>
---
 arch/arm/boot/dts/am335x-bone.dts |   15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/arch/arm/boot/dts/am335x-bone.dts b/arch/arm/boot/dts/am335x-bone.dts
index 8fdf43a..b0c98cd 100644
--- a/arch/arm/boot/dts/am335x-bone.dts
+++ b/arch/arm/boot/dts/am335x-bone.dts

@@ -46,3 +46,18 @@
 	regulator-boot-on;
 	regulator-always-on;
 };
+
+&am3358_pinmux {
+
+	pinctrl-names = "default";
+	pinctrl-0 = <&userled_pins>;
+
+	userled_pins: pinmux_userled_pins {
+		pinctrl-single,pins = <
+			0x54 0x7	/* gpmc_a5.gpio1_21, OUTPUT | MODE7 */
+			0x58 0x17	/* gpmc_a6.gpio1_22, OUTPUT_PULLUP | MODE7 */
+			0x5C 0x7	/* gpmc_a7.gpio1_23, OUTPUT | MODE7 */
+			0x60 0x17	/* gpmc_a8.gpio1_24, OUTPUT_PULLUP | MODE7 */
+		>;
+	};
+};

-- 
1.7.9.5

Hi,

On 07/24/2012 06:45 PM, AnilKumar Ch wrote:

I'm just curious about the size here: how it ended up as 0x0338?
While looking at the TRM of AM335x I can come up with 0x0238 (0x44e10800 -
0x44e10a38), but I don't see any sings of the remaining 0x0100 to be
documented at least.

+		#address-cells = <1>;
+		#size-cells = <0>;
+		pinctrl-single,register-width = <32>;
+		pinctrl-single,function-mask = <0x7F>;
+	};
+
 	/*
 	 * XXX: Use a flat representation of the AM33XX interconnect.
 	 * The real AM33XX interconnect network is quite complex.Since

-- 
P?ter

Hi Peter,

On Fri, Jul 27, 2012 at 14:40:52, Ujfalusi, Peter wrote:

Hi,

On 07/24/2012 06:45 PM, AnilKumar Ch wrote:

quoted

Adds basic pinctrl support for AM33XX family of devices. This patch
is based on the pinctrl-simple driver submitted by Tony Lindgren's
here: http://lwn.net/Articles/496075/

Signed-off-by: AnilKumar Ch <redacted>
---
 arch/arm/boot/dts/am33xx.dtsi |    9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index 59509c4..9b974dc 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi

@@ -40,6 +40,15 @@
 		};
 	};
 
+	am3358_pinmux: pinmux at 44E10800 {
+		compatible = "pinctrl-single";
+		reg = <0x44E10800 0x0338>;

I'm just curious about the size here: how it ended up as 0x0338?
While looking at the TRM of AM335x I can come up with 0x0238 (0x44e10800 -
0x44e10a38), but I don't see any sings of the remaining 0x0100 to be
documented at least.

No, pinmux registers are available till 0x44E10B38, look at AM335x latest TRM
or pinmux utility (we cannot find the exact offsets but pins we can find after
0x0A38, conf_ddr_resetn) at http://www.ti.com/tool/pinmuxtool

Regards
AnilKumar

* AnilKumar, Chimata [off-list ref] [120731 06:37]:

Hi Peter,

On Fri, Jul 27, 2012 at 14:40:52, Ujfalusi, Peter wrote:

quoted

Hi,

On 07/24/2012 06:45 PM, AnilKumar Ch wrote:

quoted

Adds basic pinctrl support for AM33XX family of devices. This patch
is based on the pinctrl-simple driver submitted by Tony Lindgren's
here: http://lwn.net/Articles/496075/

Signed-off-by: AnilKumar Ch <redacted>
---
 arch/arm/boot/dts/am33xx.dtsi |    9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index 59509c4..9b974dc 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi

@@ -40,6 +40,15 @@
 		};
 	};
 
+	am3358_pinmux: pinmux at 44E10800 {
+		compatible = "pinctrl-single";
+		reg = <0x44E10800 0x0338>;

I'm just curious about the size here: how it ended up as 0x0338?
While looking at the TRM of AM335x I can come up with 0x0238 (0x44e10800 -
0x44e10a38), but I don't see any sings of the remaining 0x0100 to be
documented at least.

No, pinmux registers are available till 0x44E10B38, look at AM335x latest TRM
or pinmux utility (we cannot find the exact offsets but pins we can find after
0x0A38, conf_ddr_resetn) at http://www.ti.com/tool/pinmuxtool

If you have a hole inbetween the registers it sounds like you also have core and
wkup domains? In that case those should be set up as separate controllers as other
SCM registers may be inbetween those domains.

Tony

Hi Tony,

On Tue, Aug 07, 2012 at 13:13:48, Tony Lindgren wrote:

* AnilKumar, Chimata [off-list ref] [120731 06:37]:

quoted

Hi Peter,

On Fri, Jul 27, 2012 at 14:40:52, Ujfalusi, Peter wrote:

quoted

Hi,

On 07/24/2012 06:45 PM, AnilKumar Ch wrote:

quoted

Adds basic pinctrl support for AM33XX family of devices. This patch
is based on the pinctrl-simple driver submitted by Tony Lindgren's
here: http://lwn.net/Articles/496075/

Signed-off-by: AnilKumar Ch <redacted>
---
 arch/arm/boot/dts/am33xx.dtsi |    9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index 59509c4..9b974dc 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi

@@ -40,6 +40,15 @@
 		};
 	};
 
+	am3358_pinmux: pinmux at 44E10800 {
+		compatible = "pinctrl-single";
+		reg = <0x44E10800 0x0338>;

I'm just curious about the size here: how it ended up as 0x0338?
While looking at the TRM of AM335x I can come up with 0x0238 (0x44e10800 -
0x44e10a38), but I don't see any sings of the remaining 0x0100 to be
documented at least.

No, pinmux registers are available till 0x44E10B38, look at AM335x latest TRM
or pinmux utility (we cannot find the exact offsets but pins we can find after
0x0A38, conf_ddr_resetn) at http://www.ti.com/tool/pinmuxtool

If you have a hole inbetween the registers it sounds like you also have core and
wkup domains? In that case those should be set up as separate controllers as other
SCM registers may be inbetween those domains.

In case of AM33XX we have only one padconf domain and it do not have any holes
in between.

Regards
AnilKumar

On 07/31/2012 04:37 PM, AnilKumar, Chimata wrote:

quoted

I'm just curious about the size here: how it ended up as 0x0338?
While looking at the TRM of AM335x I can come up with 0x0238 (0x44e10800 -
0x44e10a38), but I don't see any sings of the remaining 0x0100 to be
documented at least.

No, pinmux registers are available till 0x44E10B38, look at AM335x latest TRM
or pinmux utility (we cannot find the exact offsets but pins we can find after
0x0A38, conf_ddr_resetn) at http://www.ti.com/tool/pinmuxtool

I have looked at the latest TRM (Rev F, SPRUH73F -  public TRM) and there is
not mention of registers between 0x0a34 and 0x0e00.
I can not even find any reference of conf_ddr_resetn register either in the TRM.
I can not check with the pinmuxtool since it is crashing with wine under Linux.
There could be registers after 0x0a34, but they are not publicly documented...

-- 
P?ter

Peter,

On Wed, Aug 08, 2012 at 17:35:44, Ujfalusi, Peter wrote:

On 07/31/2012 04:37 PM, AnilKumar, Chimata wrote:

quoted

quoted

I'm just curious about the size here: how it ended up as 0x0338?
While looking at the TRM of AM335x I can come up with 0x0238 (0x44e10800 -
0x44e10a38), but I don't see any sings of the remaining 0x0100 to be
documented at least.

No, pinmux registers are available till 0x44E10B38, look at AM335x latest TRM
or pinmux utility (we cannot find the exact offsets but pins we can find after
0x0A38, conf_ddr_resetn) at http://www.ti.com/tool/pinmuxtool

I have looked at the latest TRM (Rev F, SPRUH73F -  public TRM) and there is
not mention of registers between 0x0a34 and 0x0e00.
I can not even find any reference of conf_ddr_resetn register either in the TRM.
I can not check with the pinmuxtool since it is crashing with wine under Linux.
There could be registers after 0x0a34, but they are not publicly documented...

Thanks for pointing this, I was referring older version (Rev C) of TRM which have
the details which is not present in latest TRM. These pins are dedicated ones so
pinmuxing is not required. I will submit new version.

Thanks
AnilKumar