[PATCH 0/4] memcpy optimized with strd/ldrd

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5 messages, 2 authors, 2012-04-26 · open the first message on its own page

[PATCH 0/4] memcpy optimized with strd/ldrd

From: Boojin Kim <hidden>
Date: 2012-03-30 11:41:14

Nicolas Pitre wrote:

Here's my version.  Lightly tested.
I have no A15 hardware to run any performance comparison though.
I'm reviewing and testing your patch. But, My other work disturbs to reviewing it.
I will give you feedback soon within this week.
Wait a little more.
And, Thanks for your patches. :)
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[PATCH 0/4] memcpy optimized with strd/ldrd

From: Nicolas Pitre <hidden>
Date: 2012-03-30 13:19:13

On Fri, 30 Mar 2012, Boojin Kim wrote:
Nicolas Pitre wrote:
quoted

Here's my version.  Lightly tested.
I have no A15 hardware to run any performance comparison though.
I'm reviewing and testing your patch. But, My other work disturbs to reviewing it.
I will give you feedback soon within this week.
Wait a little more.
And, Thanks for your patches. :)
FYI, it occurred to me that some corner cases might not be quite right 
with regards to alignment for the STRD instruction.  It seems that the 
hardware on which I tested it (Marvell Dove CPU) apparently copes with 
misaligned SDRD's when they're still 32-bit aligned.  So I need to run 
this code through a real validation harness on different hardware.


Nicolas

[PATCH 0/4] memcpy optimized with strd/ldrd

From: Boojin Kim <hidden>
Date: 2012-04-03 08:07:21

Nicolas Pitre wrote:
quoted
quoted
Here's my version.  Lightly tested.
I have no A15 hardware to run any performance comparison though.
I'm reviewing and testing your patch. But, My other work disturbs to reviewing it.
I will give you feedback soon within this week.
Wait a little more.
And, Thanks for your patches. :)
FYI, it occurred to me that some corner cases might not be quite right
with regards to alignment for the STRD instruction.  It seems that the
hardware on which I tested it (Marvell Dove CPU) apparently copes with
misaligned SDRD's when they're still 32-bit aligned.  So I need to run
this code through a real validation harness on different hardware.
It's sad, but the performance result wasn't better after adapting your patch.
I think something on 1~3 patch brings performance degreasing.
Thanks :)

Nicolas

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linux-arm-kernel mailing list
linux-arm-kernel at lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[PATCH 0/4] memcpy optimized with strd/ldrd

From: Nicolas Pitre <hidden>
Date: 2012-04-03 14:48:33

On Tue, 3 Apr 2012, Boojin Kim wrote:
Nicolas Pitre wrote:
quoted
quoted
quoted
Here's my version.  Lightly tested.
I have no A15 hardware to run any performance comparison though.
I'm reviewing and testing your patch. But, My other work disturbs to reviewing it.
I will give you feedback soon within this week.
Wait a little more.
And, Thanks for your patches. :)
FYI, it occurred to me that some corner cases might not be quite right
with regards to alignment for the STRD instruction.  It seems that the
hardware on which I tested it (Marvell Dove CPU) apparently copes with
misaligned SDRD's when they're still 32-bit aligned.  So I need to run
this code through a real validation harness on different hardware.
It's sad, but the performance result wasn't better after adapting your patch.
I think something on 1~3 patch brings performance degreasing.
If you could identify which patch is responsible that would be helpful.

Thanks.


Nicolas

[PATCH 0/4] memcpy optimized with strd/ldrd

From: Boojin Kim <hidden>
Date: 2012-04-26 07:35:40

Nicolas Pitre wrote:
Sent: Tuesday, April 03, 2012 11:49 PM
To: Boojin Kim
Cc: linux-arm-kernel at lists.infradead.org
Subject: RE: [PATCH 0/4] memcpy optimized with strd/ldrd

On Tue, 3 Apr 2012, Boojin Kim wrote:
quoted
Nicolas Pitre wrote:
quoted
quoted
quoted
Here's my version.  Lightly tested.
I have no A15 hardware to run any performance comparison though.
I'm reviewing and testing your patch. But, My other work disturbs to reviewing it.
I will give you feedback soon within this week.
Wait a little more.
And, Thanks for your patches. :)
FYI, it occurred to me that some corner cases might not be quite right
with regards to alignment for the STRD instruction.  It seems that the
hardware on which I tested it (Marvell Dove CPU) apparently copes with
misaligned SDRD's when they're still 32-bit aligned.  So I need to run
this code through a real validation harness on different hardware.
It's sad, but the performance result wasn't better after adapting your patch.
I think something on 1~3 patch brings performance degreasing.
If you could identify which patch is responsible that would be helpful.
Sorry for late response. I'm so busy these days. Y_Y
I checked your patches. And, the 1st patch makes performance drop.
Transmit time for 4KB memcpy is 489ns. After applying 1st patch, the transmit time is 578ns.
Performance also drops on memcpy of other small size about 10%.
I wish this is helpful for you.
Thanks,
Thanks.


Nicolas

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