OMAP3 L2/outer cache enabled in kernel (after being disabled by uBoot)?
From: catalin.marinas@arm.com (Catalin Marinas)
Date: 2012-01-17 12:11:38
Also in:
linux-omap
Possibly related (same subject, not in this thread)
- 2012-02-02 · OMAP3 L2/outer cache enabled in kernel (after being disabled by uBoot)? · catalin.marinas@arm.com (Catalin Marinas)
- 2012-02-02 · OMAP3 L2/outer cache enabled in kernel (after being disabled by uBoot)? · Russell King - ARM Linux <hidden>
- 2012-02-02 · OMAP3 L2/outer cache enabled in kernel (after being disabled by uBoot)? · catalin.marinas@arm.com (Catalin Marinas)
- 2012-02-01 · OMAP3 L2/outer cache enabled in kernel (after being disabled by uBoot)? · Shilimkar, Santosh <hidden>
- 2012-01-31 · OMAP3 L2/outer cache enabled in kernel (after being disabled by uBoot)? · nico@fluxnic.net (Nicolas Pitre)
On Tue, Jan 17, 2012 at 08:54:44AM +0000, Joe Woodward wrote:
So, is the upshot of this that the kernel isn't going to be in a position to enable the L2/outer cache on OMAP3 (due to the need for hacky/unmaintainable code)? Hence the bootloader/uBoot had better leave it enabled...
It could but the Linux decompressor needs to be aware and either flush the L2 (more difficult as it doesn't have all the device information) or set the page table attributes to outer non-cacheable (TEX[2:0] = 0b100). The latter may still not work if there are stale L2 cache lines left by U-Boot (and that's always possible unless U-Boot also uses outer non-cacheable memory attributes). But I would agree with Aneesh - can we not enabled the L2 at a later point? -- Catalin