Greg KH [off-list ref] writes:
On Mon, Oct 10, 2011 at 02:38:27PM +0200, Harro Haan wrote:
quoted
The Kirkwood gave an unaligned memory access error on
line 742 of drivers/usb/host/echi-hcd.c:
"ehci->last_periodic_enable = ktime_get_real();"
What is "The Kirkwood"? What size processor is this?
It's an ARM926-like CPU from Marvell.
--
M?ns Rullg?rd
mans at mansr.com
On Mon, Oct 10, 2011 at 05:29:13PM +0100, M?ns Rullg?rd wrote:
Greg KH [off-list ref] writes:
quoted
On Mon, Oct 10, 2011 at 02:38:27PM +0200, Harro Haan wrote:
quoted
The Kirkwood gave an unaligned memory access error on
line 742 of drivers/usb/host/echi-hcd.c:
"ehci->last_periodic_enable = ktime_get_real();"
What is "The Kirkwood"? What size processor is this?
It's an ARM926-like CPU from Marvell.
32 or 64bit?
Greg KH writes:
> On Mon, Oct 10, 2011 at 05:29:13PM +0100, M?ns Rullg?rd wrote:
> > Greg KH [off-list ref] writes:
> >
> > > On Mon, Oct 10, 2011 at 02:38:27PM +0200, Harro Haan wrote:
> > >> The Kirkwood gave an unaligned memory access error on
> > >> line 742 of drivers/usb/host/echi-hcd.c:
> > >> "ehci->last_periodic_enable = ktime_get_real();"
> > >
> > > What is "The Kirkwood"? What size processor is this?
> >
> > It's an ARM926-like CPU from Marvell.
>
> 32 or 64bit?
All ARMs are 32-bit, but some have instructions for loading or
storing 2 x 32 bits at a time, but also require the corresponding
memory address to be 64-bit aligned.
On Mon, Oct 10, 2011 at 07:31:26PM +0200, Mikael Pettersson wrote:
Greg KH writes:
> On Mon, Oct 10, 2011 at 05:29:13PM +0100, M?ns Rullg?rd wrote:
> > Greg KH [off-list ref] writes:
> >
> > > On Mon, Oct 10, 2011 at 02:38:27PM +0200, Harro Haan wrote:
> > >> The Kirkwood gave an unaligned memory access error on
> > >> line 742 of drivers/usb/host/echi-hcd.c:
> > >> "ehci->last_periodic_enable = ktime_get_real();"
> > >
> > > What is "The Kirkwood"? What size processor is this?
> >
> > It's an ARM926-like CPU from Marvell.
>
> 32 or 64bit?
All ARMs are 32-bit, but some have instructions for loading or
storing 2 x 32 bits at a time, but also require the corresponding
memory address to be 64-bit aligned.
Ah, ok, that makes more sense here. I'll go queue it up.
greg k-h