[PATCH 3/3] mach-ux500: unlock I&D l2x0 caches before init
From: Linus Walleij <hidden>
Date: 2011-08-24 09:23:55
Subsystem:
arm port, arm/nomadik/ux500 architectures, the rest · Maintainers:
Russell King, Linus Walleij, Linus Torvalds
From: Linus Walleij <redacted> Apparently U8500 U-Boot versions may leave the l2x0 locked down before executing the kernel. Make sure we unlock it before we initialize the l2x0. Cc: Srinidhi Kasagar <redacted> Cc: Rabin Vincent <redacted> Signed-off-by: Linus Walleij <redacted> --- arch/arm/mach-ux500/cache-l2x0.c | 10 ++++++++++ 1 files changed, 10 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-ux500/cache-l2x0.c b/arch/arm/mach-ux500/cache-l2x0.c
index aa2d77f..f5c31f1 100644
--- a/arch/arm/mach-ux500/cache-l2x0.c
+++ b/arch/arm/mach-ux500/cache-l2x0.c@@ -59,6 +59,16 @@ static int ux500_l2x0_init(void) else ux500_unknown_soc(); + /* + * Unlock Data and Instruction Lock if locked. Ux500 U-Boot versions + * apparently locks both caches before jumping to the kernel. + */ + if (readl_relaxed(l2x0_base + L2X0_LOCKDOWN_WAY_D) & 0xFF) + writel_relaxed(0x0, l2x0_base + L2X0_LOCKDOWN_WAY_D); + + if (readl_relaxed(l2x0_base + L2X0_LOCKDOWN_WAY_I) & 0xFF) + writel_relaxed(0x0, l2x0_base + L2X0_LOCKDOWN_WAY_I); + /* 64KB way size, 8 way associativity, force WA */ l2x0_init(l2x0_base, 0x3e060000, 0xc0000fff);
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1.7.3.2