[PATCH 1/2] ARM: perf: reset counters on all CPUs during initialisation

Hi Will,

On Wed, Mar 23, 2011 at 2:39 PM, Will Deacon [off-list ref] wrote:

Hi Jean,

quoted

On Wed, Mar 16, 2011 at 4:38 PM, Will Deacon [off-list ref] wrote:

quoted

ARMv7 dictates that the interrupt-enable and count-enable registers for
each PMU counter are UNKNOWN following core reset.

Great! Is this development driven by actual issues or by precaution?

quoted

This patch adds an arch_initcall to the ARMv7 perf events backend which
disables the counters on each CPU prior to setting the Enable bit in the
PMCR.

Also the function rename is a good thing.

quoted

Cc: Jean Pihet <redacted>
Signed-off-by: Will Deacon <redacted>

Acked-by: Jean Pihet <redacted>

I don't think this patch is safe for combined v6/v7 kernels because the
arch_initcall will try to poke the v7 PMU regardless of whether or not
it exists. I'll try and rework something and send another version to the
list.

Ok. The new code should probably be called from *read_num_pmnc_events.

I've removed it from the patch system but left the isb patch there
because that is fine as it is.

Agree

Stay tuned...

Will

Thanks,
Jean

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quoted

I don't think this patch is safe for combined v6/v7 kernels because the
arch_initcall will try to poke the v7 PMU regardless of whether or not
it exists. I'll try and rework something and send another version to the
list.

Ok. The new code should probably be called from *read_num_pmnc_events.

I thought that initially, but we need SMP up and running for the cross
calls. Since read_num_pmnc_events is called via an early_initcall, that's
not possible (which is the reason I used an arch_initcall in the first place).

The solution I've come up with is adding a ->reset function pointer to
struct arm_pmu, which can be called via an arch_initcall in perf_event.c
for the PMU it ends up using. I'll post it in a bit.

Will