[PATCH] i.MX51 iomux: Fixes MX51_PAD_UART2_TXD__UART2_TXD declaration

Subsystems: arm port, the rest

STALE5650d

5 messages, 3 authors, 2011-02-11 · open the first message on its own page

[PATCH] i.MX51 iomux: Fixes MX51_PAD_UART2_TXD__UART2_TXD declaration

From: julien.boibessot at free.fr <hidden>
Date: 2011-02-09 09:54:01

From: Julien Boibessot <redacted>


Signed-off-by: Julien Boibessot <redacted>
---
 arch/arm/plat-mxc/include/mach/iomux-mx51.h |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx51.h b/arch/arm/plat-mxc/include/mach/iomux-mx51.h
index b6767f9..df531aa 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx51.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mx51.h
@@ -473,7 +473,7 @@
 #define _MX51_PAD_UART2_RXD__UART2_RXD		IOMUX_PAD(0x628, 0x238, 0, 0x09ec, 2, 0)
 #define _MX51_PAD_UART2_TXD__FIRI_RXD		IOMUX_PAD(0x62c, 0x23c, 1, 0x0000, 0, 0)
 #define _MX51_PAD_UART2_TXD__GPIO1_21		IOMUX_PAD(0x62c, 0x23c, 3, 0x0000, 0, 0)
-#define _MX51_PAD_UART2_TXD__UART2_TXD		IOMUX_PAD(0x62c, 0x23c, 0, 0x09ec, 3, 0)
+#define _MX51_PAD_UART2_TXD__UART2_TXD		IOMUX_PAD(0x62c, 0x23c, 0, 0x0000, 0, 0)
 #define _MX51_PAD_UART3_RXD__CSI1_D0		IOMUX_PAD(0x630, 0x240, 2, 0x0000, 0, 0)
 #define _MX51_PAD_UART3_RXD__GPIO1_22		IOMUX_PAD(0x630, 0x240, 3, 0x0000, 0, 0)
 #define _MX51_PAD_UART3_RXD__UART1_DTR		IOMUX_PAD(0x630, 0x240, 0, 0x0000, 0, 0)
-- 
1.6.0.4

[PATCH] i.MX51 iomux: Fixes MX51_PAD_UART2_TXD__UART2_TXD declaration

From: s.hauer@pengutronix.de (Sascha Hauer)
Date: 2011-02-10 13:10:51

Hi Julien,

The patch is probably fine. Can you provide a better commit log,
something like 'fixes uart3 on $myboard'?

[PATCH] i.MX51 iomux: Fixes MX51_PAD_UART2_TXD__UART2_TXD declaration

From: Julien Boibessot <hidden>
Date: 2011-02-10 13:54:52

Hi Sascha,

Sascha Hauer a ?crit :
The patch is probably fine. Can you provide a better commit log,
something like 'fixes uart3 on $myboard'?
  
yes, I will try :-)
quoted
From looking at the datasheet it is not clear to me how the current pin
configuration bahaves. It looks like a uart tx loopback in the iomuxer.
Is this correct?
  
Well I just reverted the setting back to what it was on 2.6.36, before
the recent MX51 iomux reorganisation.
IOMUXC_UART2_IPP_UART_RXD_MUX_SELECT_INPUT register (0x09ec) shouldn't
be used to configure UART2_TXD PAD, otherwise you overwrite current
UART2_RXD PAD config.
Current pin configuration seems to act as a kind of Tx->Rx loopback, yes.

Without my patch, my board (not mainlined yet) can't receive anything on
UART2 (used as console).

Julien

[PATCH] i.MX51 iomux: Fixes MX51_PAD_UART2_TXD__UART2_TXD declaration

From: s.hauer@pengutronix.de (Sascha Hauer)
Date: 2011-02-10 20:55:07

On Thu, Feb 10, 2011 at 02:54:52PM +0100, Julien Boibessot wrote:
Hi Sascha,

Sascha Hauer a ?crit :
quoted
The patch is probably fine. Can you provide a better commit log,
something like 'fixes uart3 on $myboard'?
  
yes, I will try :-)
quoted
quoted
From looking at the datasheet it is not clear to me how the current pin
configuration bahaves. It looks like a uart tx loopback in the iomuxer.
Is this correct?
  
Well I just reverted the setting back to what it was on 2.6.36, before
the recent MX51 iomux reorganisation.
IOMUXC_UART2_IPP_UART_RXD_MUX_SELECT_INPUT register (0x09ec) shouldn't
be used to configure UART2_TXD PAD, otherwise you overwrite current
UART2_RXD PAD config.
Current pin configuration seems to act as a kind of Tx->Rx loopback, yes.
Ok, would be good to have this in the commit log aswell.

Sascha
Without my patch, my board (not mainlined yet) can't receive anything on
UART2 (used as console).

Julien

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-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

[PATCH] i.MX51 iomux: Fixes MX51_PAD_UART2_TXD__UART2_TXD declaration

From: Richard Zhao <hidden>
Date: 2011-02-11 08:16:11

Hi Sascha,

On Thu, Feb 10, 2011 at 02:10:51PM +0100, Sascha Hauer wrote:
Hi Julien,

The patch is probably fine. Can you provide a better commit log,
something like 'fixes uart3 on $myboard'?

From looking at the datasheet it is not clear to me how the current pin
configuration bahaves. It looks like a uart tx loopback in the iomuxer.
Is this correct?
Yes. IOMUXC_UART2_IPP_UART_RXD_MUX_SELECT_INPUT is used to select input of
IPP_UART_RXD.  We always want it to connect to actual RXD pad.

I'll check mx50 iomux header for such issues.

Thanks
Richard
Sascha

On Wed, Feb 09, 2011 at 10:54:01AM +0100, julien.boibessot at free.fr wrote:
quoted
From: Julien Boibessot <redacted>


Signed-off-by: Julien Boibessot <redacted>
---
 arch/arm/plat-mxc/include/mach/iomux-mx51.h |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx51.h b/arch/arm/plat-mxc/include/mach/iomux-mx51.h
index b6767f9..df531aa 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx51.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mx51.h
@@ -473,7 +473,7 @@
 #define _MX51_PAD_UART2_RXD__UART2_RXD		IOMUX_PAD(0x628, 0x238, 0, 0x09ec, 2, 0)
 #define _MX51_PAD_UART2_TXD__FIRI_RXD		IOMUX_PAD(0x62c, 0x23c, 1, 0x0000, 0, 0)
 #define _MX51_PAD_UART2_TXD__GPIO1_21		IOMUX_PAD(0x62c, 0x23c, 3, 0x0000, 0, 0)
-#define _MX51_PAD_UART2_TXD__UART2_TXD		IOMUX_PAD(0x62c, 0x23c, 0, 0x09ec, 3, 0)
+#define _MX51_PAD_UART2_TXD__UART2_TXD		IOMUX_PAD(0x62c, 0x23c, 0, 0x0000, 0, 0)
 #define _MX51_PAD_UART3_RXD__CSI1_D0		IOMUX_PAD(0x630, 0x240, 2, 0x0000, 0, 0)
 #define _MX51_PAD_UART3_RXD__GPIO1_22		IOMUX_PAD(0x630, 0x240, 3, 0x0000, 0, 0)
 #define _MX51_PAD_UART3_RXD__UART1_DTR		IOMUX_PAD(0x630, 0x240, 0, 0x0000, 0, 0)
-- 
1.6.0.4
-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

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