[PATCH 0/2] IRQ-related changes

Hi,

The following two patches are enabling SPARSE_IRQ
numbering scheme on OMAP. I lightly tested on a pandaboard
and seems to be working fine so far:

# cat /proc/interrupts
           CPU0       CPU1
 39:          1          0         GIC  TWL6030-PIH
 44:       1758          0         GIC  DMA
 69:       7615          0         GIC  gp timer
 88:        195          0         GIC  i2c_omap
 89:          0          0         GIC  i2c_omap
 93:          0          0         GIC  i2c_omap
 94:          0          0         GIC  i2c_omap
102:          0          0         GIC  serial idle
104:          0          0         GIC  serial idle
105:          0          0         GIC  serial idle
106:        743          0         GIC  serial idle, OMAP UART2
115:       2356          0         GIC  mmc0
160:          0          0        GPIO  mmc0
376:          0          0     twl6030  twl4030_pwrbutton
379:          0          0     twl6030  rtc0
IPI:       1111       9537
LOC:          0          0 
Err:          0

The first patch just removes the direct access to irq_desc
array and converts it to irq_to_desc(). Second patch simply
selects HAVE_GENERIC_HARDIRQS and HAVE_SPARSE_IRQ. I boot
tested with and without enabling:

 -> General setup
  -> IRQ subsystem
   -> SPARSE_IRQ

and both kernels boot fine.

Felipe Balbi (2):
  arm: omap: gpio: don't access irq_desc array directly
  arm: omap: select HAVE_SPARSE_IRQ

 arch/arm/Kconfig          |    2 ++
 arch/arm/plat-omap/gpio.c |   10 +++++++---
 2 files changed, 9 insertions(+), 3 deletions(-)

-- 
1.7.3.4.598.g85356

Instead of accessing the irq_desc array directly
we can use irq_to_desc(irq). That will allow us to,
if wanted, select SPARSE_IRQ and irq_descs will be
added to a radix tree, instead of a array.

Signed-off-by: Felipe Balbi <redacted>
---
 arch/arm/plat-omap/gpio.c |   10 +++++++---
 1 files changed, 7 insertions(+), 3 deletions(-)

diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index c05c653..c351758 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c

@@ -905,8 +905,10 @@ static int gpio_irq_type(unsigned irq, unsigned type)
 	spin_lock_irqsave(&bank->lock, flags);
 	retval = _set_gpio_triggering(bank, get_gpio_index(gpio), type);
 	if (retval == 0) {
-		irq_desc[irq].status &= ~IRQ_TYPE_SENSE_MASK;
-		irq_desc[irq].status |= type;
+		struct irq_desc *d = irq_to_desc(irq);
+
+		d->status &= ~IRQ_TYPE_SENSE_MASK;
+		d->status |= type;
 	}
 	spin_unlock_irqrestore(&bank->lock, flags);
 

@@ -1925,7 +1927,9 @@ static int __init _omap_gpio_init(void)
 
 		for (j = bank->virtual_irq_start;
 		     j < bank->virtual_irq_start + gpio_count; j++) {
-			lockdep_set_class(&irq_desc[j].lock, &gpio_lock_class);
+			struct irq_desc *d = irq_to_desc(j);
+
+			lockdep_set_class(&d->lock, &gpio_lock_class);
 			set_irq_chip_data(j, bank);
 			if (bank_is_mpuio(bank))
 				set_irq_chip(j, &mpuio_irq_chip);

-- 
1.7.3.4.598.g85356

select HAVE_SPARSE_IRQ and irq_descs can be added
to a radix tree instead of an array.

Signed-off-by: Felipe Balbi <redacted>
---
 arch/arm/Kconfig |    2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index d56d21c0..c4ffe2e 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig

@@ -826,6 +826,8 @@ config ARCH_DAVINCI
 config ARCH_OMAP
 	bool "TI OMAP"
 	select HAVE_CLK
+	select HAVE_GENERIC_HARDIRQS
+	select HAVE_SPARSE_IRQ
 	select ARCH_REQUIRE_GPIOLIB
 	select ARCH_HAS_CPUFREQ
 	select GENERIC_CLOCKEVENTS

-- 
1.7.3.4.598.g85356

On Tue, Jan 04, 2011 at 11:39:26AM +0200, Felipe Balbi wrote:

select HAVE_SPARSE_IRQ and irq_descs can be added
to a radix tree instead of an array.

Please move HAVE_GENERIC_HARDIRQS to the config ARM entry, and remove
these:

config GENERIC_HARDIRQS
        bool
        default y

config GENERIC_HARDIRQS_NO__DO_IRQ
        def_bool y

as they're in kernel/irq/Kconfig, and are visible if HAVE_GENERIC_HARDIRQS
is enabled.

On Tue, Jan 04, 2011 at 09:54:10AM +0000, Russell King - ARM Linux wrote:

On Tue, Jan 04, 2011 at 11:39:26AM +0200, Felipe Balbi wrote:

quoted

select HAVE_SPARSE_IRQ and irq_descs can be added
to a radix tree instead of an array.

Please move HAVE_GENERIC_HARDIRQS to the config ARM entry, and remove
these:

config GENERIC_HARDIRQS
        bool
        default y

config GENERIC_HARDIRQS_NO__DO_IRQ
        def_bool y

as they're in kernel/irq/Kconfig, and are visible if HAVE_GENERIC_HARDIRQS
is enabled.

Note also that should be a separate patch from adding HAVE_SPARSE_IRQ to
OMAP, as it's an independent but necessary change.

Hi,

On Tue, Jan 04, 2011 at 09:54:10AM +0000, Russell King - ARM Linux wrote:

On Tue, Jan 04, 2011 at 11:39:26AM +0200, Felipe Balbi wrote:

quoted

select HAVE_SPARSE_IRQ and irq_descs can be added
to a radix tree instead of an array.

Please move HAVE_GENERIC_HARDIRQS to the config ARM entry, and remove
these:

config GENERIC_HARDIRQS
       bool
       default y

config GENERIC_HARDIRQS_NO__DO_IRQ
       def_bool y

as they're in kernel/irq/Kconfig, and are visible if HAVE_GENERIC_HARDIRQS
is enabled.

do you mean:

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index d56d21c0..70ff78a 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig

@@ -14,6 +14,7 @@ config ARM
  	select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
  	select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
  	select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
+	select HAVE_GENERIC_HARDIRQS
  	select HAVE_GENERIC_DMA_COHERENT
  	select HAVE_KERNEL_GZIP
  	select HAVE_KERNEL_LZO

@@ -88,10 +89,6 @@ config MCA
  	  <file:Documentation/mca.txt> (and especially the web page given
  	  there) before attempting to build an MCA bus kernel.
  
-config GENERIC_HARDIRQS
-	bool
-	default y
-
  config STACKTRACE_SUPPORT
  	bool
  	default y

@@ -171,9 +168,6 @@ config FIQ
  config ARCH_MTD_XIP
  	bool
  
-config GENERIC_HARDIRQS_NO__DO_IRQ
-	def_bool y
-
  config ARM_L1_CACHE_SHIFT_6
  	bool
  	help

@@ -510,7 +504,7 @@ config ARCH_MMP
  	select GENERIC_CLOCKEVENTS
  	select TICK_ONESHOT
  	select PLAT_PXA
-	select SPARSE_IRQ
+	select HAVE_SPARSE_IRQ
  	help
  	  Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
  

@@ -589,7 +583,7 @@ config ARCH_PXA
  	select GENERIC_CLOCKEVENTS
  	select TICK_ONESHOT
  	select PLAT_PXA
-	select SPARSE_IRQ
+	select HAVE_SPARSE_IRQ
  	help
  	  Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
  

@@ -1398,15 +1392,6 @@ config HW_PERF_EVENTS
  	  Enable hardware performance counter support for perf events. If
  	  disabled, perf events will use software events only.
  
-config SPARSE_IRQ
-	def_bool n
-	help
-	  This enables support for sparse irqs. This is useful in general
-	  as most CPUs have a fairly sparse array of IRQ vectors, which
-	  the irq_desc then maps directly on to. Systems with a high
-	  number of off-chip IRQs will want to treat this as
-	  experimental until they have been independently verified.
-
  source "mm/Kconfig"
  
  config FORCE_MAX_ZONEORDER

-- 
balbi

On Tue, Jan 04, 2011 at 12:34:32PM +0200, Felipe Balbi wrote:

do you mean:

Yes, but without the breakage caused by your mailer - posting patches
with flowed formatting is a recipe for this kind of disaster:

Content-Type: text/plain; charset=us-ascii; format=flowed

You appear to be using mutt, so set:

set text_flowed=no

in your .muttrc to avoid this corruption.

Hi,

On Tue, Jan 04, 2011 at 11:42:07AM +0000, Russell King - ARM Linux wrote:

On Tue, Jan 04, 2011 at 12:34:32PM +0200, Felipe Balbi wrote:

quoted

do you mean:

Yes, but without the breakage caused by your mailer - posting patches

good, I'll re-send the series in a bit.

with flowed formatting is a recipe for this kind of disaster:

Content-Type: text/plain; charset=us-ascii; format=flowed

You appear to be using mutt, so set:

set text_flowed=no

in your .muttrc to avoid this corruption.

sorry about that, fixed.

-- 
balbi