Thread (53 messages) 53 messages, 13 authors, 2015-08-14

Re: [PATCH 29/31] parisc: handle page-less SG entries

From: Dan Williams <hidden>
Date: 2015-08-14 03:30:53
Also in: linux-arch, linux-media, linux-mips, linux-s390, linuxppc-dev, lkml, nvdimm, sparclinux

On Thu, Aug 13, 2015 at 7:31 AM, Christoph Hellwig [off-list ref] wrote:
On Wed, Aug 12, 2015 at 09:01:02AM -0700, Linus Torvalds wrote:
quoted
I'm assuming that anybody who wants to use the page-less
scatter-gather lists always does so on memory that isn't actually
virtually mapped at all, or only does so on sane architectures that
are cache coherent at a physical level, but I'd like that assumption
*documented* somewhere.
It's temporarily mapped by kmap-like helpers.  That code isn't in
this series. The most recent version of it is here:

https://git.kernel.org/cgit/linux/kernel/git/djbw/nvdimm.git/commit/?h=pfn&id=de8237c99fdb4352be2193f3a7610e902b9bb2f0

note that it's not doing the cache flushing it would have to do yet, but
it's also only enabled for x86 at the moment.
For virtually tagged caches I assume we would temporarily map with
kmap_atomic_pfn_t(), similar to how drm_clflush_pages() implements
powerpc support.  However with DAX we could end up with multiple
virtual aliases for a page-less pfn.
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