Re: In kernel PIC support: kernel patch

On Fri, 2007-06-22 at 12:57 +0300, Avi Kivity wrote:

Gregory Haskins wrote:

quoted

Unless I misunderstood Avi, I think he was suggesting that use use
KVM_EXTINT/ISA_INTERRUPT as a way to distinguish between the dual modes
of ISA_INTERRUPT as I have today (e.g.
ISA_INTERRUPT(level-1)/ISA_INTERRUPT(level-2)).  This doesn't really
have anything to do with LINT0/1 (directly, anyway).  Hope this helps to
clarify. 
  

Well, we don't need to think in terms of modes.  Each ioctl controls
interrupts at a different point in the architecture.

KVM_INTERRUPT is at the interface between the processor core and the
lapic/system bus.

KVM_APIC_MESSAGE is at the apic bus.

KVM_EXTINT is at the interface between the lapic and the system bus.  If
the guest disabled the local apic, it's equivalent to the KVM_INTERRUPT
(injecting a vector directly); otherwise it is handled by the lapic
(LINT0/1 handling).

Ok, now I understand what Eddie was saying about LINT0/1 and we were
both describing the same thing in different ways.  I think we are all on
the same page.

KVM_ISA_INTERRUPT (maybe KVM_IRQ_LINE, to signify it doesn't carry a
vector) is at the boundary between the interrupt controller chips and
the rest of the system.

Ack on s/ISA/IRQ or something similar


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