[PATCH 0/2] add aes-sha224-hmac support to Intel QAT driver

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5 messages, 2 authors, 2016-09-07 · open the first message on its own page

[PATCH 0/2] add aes-sha224-hmac support to Intel QAT driver

From: Deepak Kumar Jain <hidden>
Date: 2016-08-18 13:17:45

This patchset adds support of aes-sha224-hmac
in Intel(R) QuickAssist Technology driver.

This patchset depends on following patchset:
"crypto/qat: add MD5 HMAC capability to Intel QAT driver"
(http://dpdk.org/dev/patchwork/patch/15165/)

Jain, Deepak K (2):
  crypto/qat: add aes-sha224-hmac capability to Intel QAT driver
  app/test: add test cases for aes-sha224-hmac for Intel QAT driver

 app/test/test_cryptodev_aes.c                    |  6 +++--
 doc/guides/cryptodevs/qat.rst                    |  1 +
 drivers/crypto/qat/qat_adf/qat_algs_build_desc.c | 33 ++++++++++++++++++++++++
 drivers/crypto/qat/qat_crypto.c                  |  4 ++-
 4 files changed, 41 insertions(+), 3 deletions(-)

-- 
2.5.5

[PATCH 1/2] crypto/qat: add aes-sha224-hmac capability to Intel QAT driver

From: Deepak Kumar Jain <hidden>
Date: 2016-08-18 13:17:46

From: "Jain, Deepak K" <redacted>

Added support of aes-sha224-hmac in Intel(R) QuickAssist driver

Signed-off-by: Deepak Kumar Jain <redacted>
---
 doc/guides/cryptodevs/qat.rst                    |  1 +
 drivers/crypto/qat/qat_adf/qat_algs_build_desc.c | 33 ++++++++++++++++++++++++
 drivers/crypto/qat/qat_crypto.c                  |  4 ++-
 3 files changed, 37 insertions(+), 1 deletion(-)

diff --git a/doc/guides/cryptodevs/qat.rst b/doc/guides/cryptodevs/qat.rst
index 485abb4..7f630be 100644
--- a/doc/guides/cryptodevs/qat.rst
+++ b/doc/guides/cryptodevs/qat.rst

@@ -53,6 +53,7 @@ Cipher algorithms:
 Hash algorithms:
 
 * ``RTE_CRYPTO_AUTH_SHA1_HMAC``
+* ``RTE_CRYPTO_AUTH_SHA224_HMAC``
 * ``RTE_CRYPTO_AUTH_SHA256_HMAC``
 * ``RTE_CRYPTO_AUTH_SHA512_HMAC``
 * ``RTE_CRYPTO_AUTH_AES_XCBC_MAC``

diff --git a/drivers/crypto/qat/qat_adf/qat_algs_build_desc.c b/drivers/crypto/qat/qat_adf/qat_algs_build_desc.c
index 521a9c4..77e6548 100644
--- a/drivers/crypto/qat/qat_adf/qat_algs_build_desc.c
+++ b/drivers/crypto/qat/qat_adf/qat_algs_build_desc.c

@@ -71,6 +71,9 @@ static int qat_hash_get_state1_size(enum icp_qat_hw_auth_algo qat_hash_alg)
 	case ICP_QAT_HW_AUTH_ALGO_SHA1:
 		return QAT_HW_ROUND_UP(ICP_QAT_HW_SHA1_STATE1_SZ,
 						QAT_HW_DEFAULT_ALIGNMENT);
+	case ICP_QAT_HW_AUTH_ALGO_SHA224:
+		return QAT_HW_ROUND_UP(ICP_QAT_HW_SHA224_STATE1_SZ,
+						QAT_HW_DEFAULT_ALIGNMENT);
 	case ICP_QAT_HW_AUTH_ALGO_SHA256:
 		return QAT_HW_ROUND_UP(ICP_QAT_HW_SHA256_STATE1_SZ,
 						QAT_HW_DEFAULT_ALIGNMENT);

@@ -107,6 +110,8 @@ static int qat_hash_get_digest_size(enum icp_qat_hw_auth_algo qat_hash_alg)
 	switch (qat_hash_alg) {
 	case ICP_QAT_HW_AUTH_ALGO_SHA1:
 		return ICP_QAT_HW_SHA1_STATE1_SZ;
+	case ICP_QAT_HW_AUTH_ALGO_SHA224:
+		return ICP_QAT_HW_SHA224_STATE1_SZ;
 	case ICP_QAT_HW_AUTH_ALGO_SHA256:
 		return ICP_QAT_HW_SHA256_STATE1_SZ;
 	case ICP_QAT_HW_AUTH_ALGO_SHA512:

@@ -129,6 +134,8 @@ static int qat_hash_get_block_size(enum icp_qat_hw_auth_algo qat_hash_alg)
 	switch (qat_hash_alg) {
 	case ICP_QAT_HW_AUTH_ALGO_SHA1:
 		return SHA_CBLOCK;
+	case ICP_QAT_HW_AUTH_ALGO_SHA224:
+		return SHA256_CBLOCK;
 	case ICP_QAT_HW_AUTH_ALGO_SHA256:
 		return SHA256_CBLOCK;
 	case ICP_QAT_HW_AUTH_ALGO_SHA512:

@@ -158,6 +165,17 @@ static int partial_hash_sha1(uint8_t *data_in, uint8_t *data_out)
 	return 0;
 }
 
+static int partial_hash_sha224(uint8_t *data_in, uint8_t *data_out)
+{
+	SHA256_CTX ctx;
+
+	if (!SHA224_Init(&ctx))
+		return -EFAULT;
+	SHA256_Transform(&ctx, data_in);
+	rte_memcpy(data_out, &ctx, SHA256_DIGEST_LENGTH);
+	return 0;
+}
+
 static int partial_hash_sha256(uint8_t *data_in, uint8_t *data_out)
 {
 	SHA256_CTX ctx;

@@ -220,6 +238,13 @@ static int partial_hash_compute(enum icp_qat_hw_auth_algo hash_alg,
 			*hash_state_out_be32 =
 				rte_bswap32(*(((uint32_t *)digest)+i));
 		break;
+	case ICP_QAT_HW_AUTH_ALGO_SHA224:
+		if (partial_hash_sha224(data_in, digest))
+			return -EFAULT;
+		for (i = 0; i < digest_size >> 2; i++, hash_state_out_be32++)
+			*hash_state_out_be32 =
+				rte_bswap32(*(((uint32_t *)digest)+i));
+		break;
 	case ICP_QAT_HW_AUTH_ALGO_SHA256:
 		if (partial_hash_sha256(data_in, digest))
 			return -EFAULT;

@@ -575,6 +600,14 @@ int qat_alg_aead_session_create_content_desc_auth(struct qat_session *cdesc,
 		}
 		state2_size = RTE_ALIGN_CEIL(ICP_QAT_HW_SHA1_STATE2_SZ, 8);
 		break;
+	case ICP_QAT_HW_AUTH_ALGO_SHA224:
+		if (qat_alg_do_precomputes(ICP_QAT_HW_AUTH_ALGO_SHA224,
+			authkey, authkeylen, cdesc->cd_cur_ptr, &state1_size)) {
+			PMD_DRV_LOG(ERR, "(SHA)precompute failed");
+			return -EFAULT;
+		}
+		state2_size = ICP_QAT_HW_SHA224_STATE2_SZ;
+		break;
 	case ICP_QAT_HW_AUTH_ALGO_SHA256:
 		if (qat_alg_do_precomputes(ICP_QAT_HW_AUTH_ALGO_SHA256,
 			authkey, authkeylen, cdesc->cd_cur_ptr,	&state1_size)) {

diff --git a/drivers/crypto/qat/qat_crypto.c b/drivers/crypto/qat/qat_crypto.c
index b9558d0..e872759 100644
--- a/drivers/crypto/qat/qat_crypto.c
+++ b/drivers/crypto/qat/qat_crypto.c

@@ -539,6 +539,9 @@ qat_crypto_sym_configure_session_auth(struct rte_cryptodev *dev,
 	case RTE_CRYPTO_AUTH_SHA512_HMAC:
 		session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_SHA512;
 		break;
+	case RTE_CRYPTO_AUTH_SHA224_HMAC:
+		session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_SHA224;
+		break;
 	case RTE_CRYPTO_AUTH_AES_XCBC_MAC:
 		session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_AES_XCBC_MAC;
 		break;

@@ -556,7 +559,6 @@ qat_crypto_sym_configure_session_auth(struct rte_cryptodev *dev,
 	case RTE_CRYPTO_AUTH_SHA256:
 	case RTE_CRYPTO_AUTH_SHA512:
 	case RTE_CRYPTO_AUTH_SHA224:
-	case RTE_CRYPTO_AUTH_SHA224_HMAC:
 	case RTE_CRYPTO_AUTH_SHA384:
 	case RTE_CRYPTO_AUTH_SHA384_HMAC:
 	case RTE_CRYPTO_AUTH_MD5:

-- 
2.5.5

[PATCH 2/2] app/test: add test cases for aes-sha224-hmac for Intel QAT driver

From: Deepak Kumar Jain <hidden>
Date: 2016-08-18 13:17:48

From: "Jain, Deepak K" <redacted>

Added aes-sha224-hmac algorithm to test file for Intel(R) QuickAssist
Technology Driver

Signed-off-by: Deepak Kumar Jain <redacted>
---
 app/test/test_cryptodev_aes.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/app/test/test_cryptodev_aes.c b/app/test/test_cryptodev_aes.c
index bf832b6..6ad2674 100644
--- a/app/test/test_cryptodev_aes.c
+++ b/app/test/test_cryptodev_aes.c

@@ -211,14 +211,16 @@ static const struct aes_test_case aes_test_cases[] = {
 		.test_descr = "AES-128-CBC HMAC-SHA224 Encryption Digest",
 		.test_data = &aes_test_data_8,
 		.op_mask = AES_TEST_OP_ENC_AUTH_GEN,
-		.pmd_mask = AES_TEST_TARGET_PMD_MB
+		.pmd_mask = AES_TEST_TARGET_PMD_MB |
+			AES_TEST_TARGET_PMD_QAT
 	},
 	{
 		.test_descr = "AES-128-CBC HMAC-SHA224 Decryption Digest "
 			"Verify",
 		.test_data = &aes_test_data_8,
 		.op_mask = AES_TEST_OP_AUTH_VERIFY_DEC,
-		.pmd_mask = AES_TEST_TARGET_PMD_MB
+		.pmd_mask = AES_TEST_TARGET_PMD_MB |
+			AES_TEST_TARGET_PMD_QAT
 	},
 	{
 		.test_descr = "AES-128-CBC HMAC-SHA384 Encryption Digest",

-- 
2.5.5

Re: [PATCH 0/2] add aes-sha224-hmac support to Intel QAT driver

From: De Lara Guarch, Pablo <hidden>
Date: 2016-09-07 17:59:34

Hi Deepak,

-----Original Message-----
From: Jain, Deepak K
Sent: Thursday, August 18, 2016 6:18 AM
To: De Lara Guarch, Pablo; Trahe, Fiona; Griffin, John
Cc: dev@dpdk.org; Jain, Deepak K
Subject: [PATCH 0/2] add aes-sha224-hmac support to Intel QAT driver

This patchset adds support of aes-sha224-hmac
in Intel(R) QuickAssist Technology driver.

This patchset depends on following patchset:
"crypto/qat: add MD5 HMAC capability to Intel QAT driver"
(http://dpdk.org/dev/patchwork/patch/15165/)

Jain, Deepak K (2):
  crypto/qat: add aes-sha224-hmac capability to Intel QAT driver
  app/test: add test cases for aes-sha224-hmac for Intel QAT driver

 app/test/test_cryptodev_aes.c                    |  6 +++--
 doc/guides/cryptodevs/qat.rst                    |  1 +
 drivers/crypto/qat/qat_adf/qat_algs_build_desc.c | 33
++++++++++++++++++++++++
 drivers/crypto/qat/qat_crypto.c                  |  4 ++-
 4 files changed, 41 insertions(+), 3 deletions(-)

--
2.5.5

Could you send a v2 with a release notes update?

Thanks,
Pablo

Re: [PATCH 0/2] add aes-sha224-hmac support to Intel QAT driver

From: Jain, Deepak K <hidden>
Date: 2016-09-07 19:33:14

HI Pablo,

-----Original Message-----
From: De Lara Guarch, Pablo
Sent: Wednesday, September 7, 2016 7:00 PM
To: Jain, Deepak K <redacted>; Trahe, Fiona
[off-list ref]; Griffin, John [off-list ref]
Cc: dev@dpdk.org
Subject: RE: [PATCH 0/2] add aes-sha224-hmac support to Intel QAT driver

Hi Deepak,

quoted

-----Original Message-----
From: Jain, Deepak K
Sent: Thursday, August 18, 2016 6:18 AM
To: De Lara Guarch, Pablo; Trahe, Fiona; Griffin, John
Cc: dev@dpdk.org; Jain, Deepak K
Subject: [PATCH 0/2] add aes-sha224-hmac support to Intel QAT driver

This patchset adds support of aes-sha224-hmac in Intel(R) QuickAssist
Technology driver.

This patchset depends on following patchset:
"crypto/qat: add MD5 HMAC capability to Intel QAT driver"
(http://dpdk.org/dev/patchwork/patch/15165/)

Jain, Deepak K (2):
  crypto/qat: add aes-sha224-hmac capability to Intel QAT driver
  app/test: add test cases for aes-sha224-hmac for Intel QAT driver

 app/test/test_cryptodev_aes.c                    |  6 +++--
 doc/guides/cryptodevs/qat.rst                    |  1 +
 drivers/crypto/qat/qat_adf/qat_algs_build_desc.c | 33
++++++++++++++++++++++++
 drivers/crypto/qat/qat_crypto.c                  |  4 ++-
 4 files changed, 41 insertions(+), 3 deletions(-)

--
2.5.5

Could you send a v2 with a release notes update?

Agreed. I will send v2 with release notes.

Thanks,
Pablo

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